The Essential Role and the Continuous Evolution of Modulation Techniques for Voltage-Source Inverters in the Past, Present, and Future Power Electronics

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future

Precise modelling of switching and conduction losses in cascaded h-bridge multilevel inverters

Nowadays, voltage source multilevel inverters are being used extensively in industry due to its many advantages, compared to conventional two level inverters, such as higher output voltage at low switching frequency, low voltage stress(dv/dt), lower total harmonic distortion (THD), less electro-magnetic interference (EMI), smaller output filter and higher fundamental output. However, the evaluation of multilevel inverter losses is much more complicated compared to two level inverters. This paper proposes an on-line model for precise calculation of conduction and switching losses for cascaded h-bridge multilevel inverter. The model is simple and efficient and gives clear process of loss calculation. A singlephase 7-level cascaded h-bridge with IGBT's as switching devices has been used as a case study of the proposed model. The inverter has been controlled using selective harmonic elimination in which the switching angles were determined using the Genetic Algorithm (GA). MATLAB-SIMULINK is used for the modelling and simulation

Optimal HSE-PWM based on genetic algorithm for seven levels diode clamped multilevel inverter

In this paper, the control of seven level diode clamped inverter with selective harmonic elimination (SHE) pulse width modulation (PWM) technique based on genetic algorithm (GA) has been developed. In standard SHE-PWM, the seven level inverters allow the elimination of only two low order harmonics. To improve the total harmonic distortion (THD), and without any modification to the inverter structure, five low order harmonics can be eliminated by suitably adding holes in the stairecase voltage leg. Furtheremore, a hole distribution in agreement with the sin function shape is proposed. For this, a real-coded genetic algorithm is applied under the standard constraints with a proposed cost function minimization that allow a better near sin function reshape of the output voltage leg. This GA computation allow to determine the switching angles for a seven-level diode clamped inverter to produce the required fundamental voltage and to eliminate undesirable harmonics. This developed procedure can eliminate a desired number of low harmonics and is only restricted by the maximal switching frequency of the power switches. The results of the suggested method are compared to the conventional SHE-PWM involved with a seven level staircase wave. They reveal that the developed method is a very effective one for optimal harmonic elimination technique

Application of Genetic Algorithm to Minimize Harmonic in Multilevel Inverter

In inverter design, harmonic voltage is the main issue which affects the performance of the inverter. Generally, the harmonic minimization problem complexity is influenced by the number of harmonic orders to be minimized. This paper presents the utilization of genetic algorithm (GA) to solve harmonic minimization problem in multilevel inverter. The objective is to find relationship between the number of minimized harmonic orders and the results of total harmonic distortion (THD). The inverter to investigate is 11-level, but it is also applicable to multilevel inverters with any number of levels. The results show that harmonic contained in the output voltage has a small dependence on the number of harmonic orders that are minimized. However, the best results are still satisfied even though involving higher number of harmonics. The best-obtained THD, evaluated until 19th harmonic, is 2.76%, which is fairly low and thus acceptable.Keywords : Harmonic, genetic algorithm, multilevel inverter and optimization.Abstrak—Dalam desain inverter, harmonisa tegangan merupakan permasalahan utama yang mempengaruhi performa inverter. Pada umumnya, kompleksitas permasalahan minimisasi harmonisa dipengaruhi oleh jumlah orde harmonisa yang akan diminimisasi. Paper ini membahas utilisasi algoritman genetika untuk menyelesaikan persoalan minimisasi harmonisa di inverter multilevel. Tujuannya adalah untuk menemukan hubungan antara jumlah orde harmonisa yang diminimisasi dan total harmonic distortion (THD) yang dihasilkan. Inverter yang diinvestigasi adalah inverter 11-level, akan tetapi studi ini bisa diaplikasikan ke inverter multilevel dengan jumlah level yang lain. Hasil studi menunjukkan bahwa harmonisa di tegangan keluaran inverter memiliki keterkaitan yang kecil terhadap jumlah orde harmonisa yang diminimisasi. Akan tetapi, hasil yang paling bagus tetap masih didapatkan ketika jumlah harmonisa yang diminimisasi banyak. THD terbaik yang diperoleh, dievaluasi hingga harmonisa ke-19, adalah 2,76%, dimana angka ini cukup kecil dan dapat diterima.Kata Kunci : Harmonisa, algoritma genetika, inverter multilevel dan optimisasi

Minimization of total harmonic distortions of cascaded H-bridge multilevel inverter by utilizing bio inspired AI algorithm

Minimizing total harmonic distortion (THD) with less system complexity and computation time is a stringent constraint for many power systems. The multilevel inverter can have low THD when switching angles are selected at the fundamental frequency. For low-order harmonic minimization, selective harmonic elimination (SHE) is the most adopted and proficient technique but it involves the non-linear transcendental equations which are very difficult to solve analytically and numerically. This paper proposes a genetic algorithm (GA)-based optimization technique to minimize the THD of cascaded H-bridge multilevel inverter. The GA is the finest approach for solving such complex equations by obtaining optimized switching angles. The switching angles are calculated by the genetic algorithm by solving the nonlinear transcendental equations. This paper has modeled and simulated a five-level inverter in MATLAB Simulink. The THD comparison is carried out between step modulation method and optimization method. The results reveal that THD has been reduced from 17.88 to 16.74% while third and fifth harmonics have been reduced from 3.24%, 3.7% to 0.84% and 3.3%, respectively. The optimization method along with LC filter significantly improves the power quality providing a complete sinusoidal signal for varying load

Red deer algorithm-based selective harmonic elimination technique for multilevel inverters

This paper proposed a red deer algorithm (RDA)-based selective harmonic elimination (SHE) method for multilevel inverters (MLIs). To eliminate the desired harmonic orders, the optimum switching angles of the MLI have been calculated using the proposed RDA. The calculated switching angles have been applied to the 3-phase cascaded H-bridged 11-level inverter. In addition, the performance of the proposed RDA method was compared with the results of methods such as the Newton-Raphson (NR) method, LSHADE/EpSin technique (LSHADE), whale optimization algorithm (WOA), and particle swarm optimization (PSO) used for the SHE problem in the literature. The results obtained prove that the proposed RDA optimization solves the SHE problems more effectively than other methods. It has also been observed that RDA produces good solutions in different modulation indexes

Real-Time Selective Harmonic Minimization for Multilevel Inverters Using Genetic Algorithm and Artificial Neural Network Angle Generation

This work approximates the selective harmonic elimination problem using Artificial Neural Networks (ANN) to generate the switching angles in an 11-level full bridge cascade inverter powered by five varying DC input sources. Each of the five full bridges of the cascade inverter was connected to a separate 195W solar panel. The angles were chosen such that the fundamental was kept constant and the low order harmonics were minimized or eliminated. A non-deterministic method is used to solve the system for the angles and to obtain the data set for the ANN training. The method also provides a set of acceptable solutions in the space where solutions do not exist by analytical methods. The trained ANN is a suitable tool that brings a small generalization effect on the angles\u27 precision and is able to perform in real time (50/60Hz time window)

Conventional Space-Vector Modulation Techniques versus the Single-Phase Modulator for Multilevel Converters

Space-vector modulation is a well-suited technique to be applied to multilevel converters and is an important research focus in the last 25 years. Recently, a single-phase multilevel modulator has been introduced showing its conceptual simplicity and its very low computational cost. In this paper, some of the most conventional multilevel space-vector modulation techniques have been chosen to compare their results with those obtained with single-phase multilevel modulators. The obtained results demonstrate that the single-phase multilevel modulators applied to each phase are equivalent with the chosen wellknown multilevel space-vector modulation techniques. In this way, single-phase multilevel modulators can be applied to a converter with any number of levels and phases avoiding the use of conceptually and mathematically complex space-vector modulation strategies. Analytical calculations and experimental results are shown validating the proposed concepts

A multilevel medium-voltage inverter for step-up-transformer-less grid connection of photovoltaic power plants

Recently, medium (0.1-5 MW) and large (>5 MW) scale photovoltaic (PV) power plants have attracted great attention, where medium-voltage grid connection (typically 6-36 kV) is essential for efficient power transmission and distribution. A power frequency transformer operated at 50 or 60 Hz is generally used to step up the traditional inverter's low output voltage (usually ≤400 V) to the medium-voltage level. Because of the heavy weight and large size of the power frequency transformer, the PV inverter system can be expensive and complex for installation and maintenance. As an alternative approach to achieve a compact and lightweight direct grid connection, this paper proposes a three-phase medium-voltage PV inverter system. The 11-kV and 33-kV PV inverter systems are designed. A scaled down three-phase 1.2-kV test rig has been constructed to validate the proposed PV inverter. The experimental results are analyzed and discussed, taking into account the switching schemes and filter circuits. The experimental results demonstrate the excellent feature of the proposed PV inverter system. © 2011-2012 IEEE

Single-carrier phase-disposition PWM techniques for multiple interleaved voltage-source converter legs

Interleaved converter legs are typically modulated with individual carriers per leg and phase-shifted PWM (PS-PWM) as it facilitates current balancing amongst the legs. Phase-disposition PWM (PD-PWM), despite the better harmonic performance, cannot be directly used due to the resulting current imbalance that may damage the converter. This paper addresses the current sharing issue and proposes a single-carrier PD-PWM technique for multiple leg two-level converters based on a hierarchy scheme derived from current sorting algorithms. An extension of the proposed algorithm through a switching state feedback loop, limiting the average switching frequency, is also developed. In both cases, the load current is shared amongst the legs and the high-quality of the output voltages and currents is maintained while the circulating currents amongst the converter legs are kept to a minimum. Simulation results demonstrate the method for multiple interleaved legs as well as its current sharing capabilities for high-power applications. Experimental results from a low-power laboratory prototype validate the operation of the proposed approach.Peer ReviewedPostprint (published version