3,112 research outputs found

    High-Throughput Contention-Free Concurrent Interleaver Architecture for Multi-Standard Turbo Decoder

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    To meet the higher data rate requirement of emerging wireless communication technology, numerous parallel turbo decoder architectures have been developed. However, the interleaver has become a major bottleneck that limits the achievable throughput in the parallel decoders due to the massive memory conflicts. In this paper, we propose a flexible Double-Buffer based Contention-Free (DBCF) interleaver architecture that can efficiently solve the memory conflict problem for parallel turbo decoders with very high parallelism. The proposed DBCF architecture enables high throughput concurrent interleaving for multi-standard turbo decoders that support UMTS/HSPA+, LTE and WiMAX, with small datapath delays and low hardware cost. We implemented the DBCF interleaver with a 65nm CMOS technology. The implementation of this highly efficient DBCF interleaver architecture shows significant improvement in terms of the maximum throughput and occupied chip area compared to the previous work.HuaweiNational Science Foundatio

    An Iteratively Decodable Tensor Product Code with Application to Data Storage

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    The error pattern correcting code (EPCC) can be constructed to provide a syndrome decoding table targeting the dominant error events of an inter-symbol interference channel at the output of the Viterbi detector. For the size of the syndrome table to be manageable and the list of possible error events to be reasonable in size, the codeword length of EPCC needs to be short enough. However, the rate of such a short length code will be too low for hard drive applications. To accommodate the required large redundancy, it is possible to record only a highly compressed function of the parity bits of EPCC's tensor product with a symbol correcting code. In this paper, we show that the proposed tensor error-pattern correcting code (T-EPCC) is linear time encodable and also devise a low-complexity soft iterative decoding algorithm for EPCC's tensor product with q-ary LDPC (T-EPCC-qLDPC). Simulation results show that T-EPCC-qLDPC achieves almost similar performance to single-level qLDPC with a 1/2 KB sector at 50% reduction in decoding complexity. Moreover, 1 KB T-EPCC-qLDPC surpasses the performance of 1/2 KB single-level qLDPC at the same decoder complexity.Comment: Hakim Alhussien, Jaekyun Moon, "An Iteratively Decodable Tensor Product Code with Application to Data Storage

    A system for co-ordinating concurrent engineering

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    Design of large made-to-order products invariably involves design activities which are increasingly being distributed globally in order to reduce costs, gain competitive advantage and utilise external expertise and resources. Designers specialise within their domain producing solutions to design problems using the tools and techniques with which they are familiar. They possess a relatively local perception of where their expertise and actions are consumed within the design process. This is further compounded when design activities are geographically distributed, resulting with the increased disassociation between an individual designer's activities and the overall design process. The tools and techniques used by designers rarely facilitate concurrency, producing solutions within a particular discipline without using or sharing information from other disciplines, and seldom considering stages within the product's life-cycle other than conceptual, embodiment or detail [1, 2]. Conventional management and maintenance of consistency throughout the product model can subsequently become difficult to achieve since there are many factors that need to be simultaneously considered whilst making achange to the product model

    Analysis of offshore wind turbine operation & maintenance using a novel time domain meteo-ocean modeling approach

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    This paper presents a novel approach to repair modeling using a time domain Auto-Regressive model to represent meteo-ocean site conditions. The short term hourly correlations, medium term access windows of periods up to days and the annual distibution of site data are captured. In addition, seasonality is included. Correlation observed between wind and wave site can be incorporated if simultaneous data exists. Using this approach a time series for both significant wave height and mean wind speed is described. This allows MTTR to be implemented within the reliability simulation as a variable process, dependent on significant wave height. This approach automatically captures site characteristics including seasonality and allows for complex analysis using time dependent constaints such as working patterns to be implemented. A simple cost model for lost revenues determined by the concurrent simulated wind speed is also presented. A preliminary investigation of the influence of component reliability and access thresholds at various existing sites on availability is presented demonstrating the abiltiy of the modeling approach to offer new insights into offshore wind turbine operation and maintenance

    Space shuttle main engine anomaly data and inductive knowledge based systems: Automated corporate expertise

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    Progress is reported on the development of SCOTTY, an expert knowledge-based system to automate the analysis procedure following test firings of the Space Shuttle Main Engine (SSME). The integration of a large-scale relational data base system, a computer graphics interface for experts and end-user engineers, potential extension of the system to flight engines, application of the system for training of newly-hired engineers, technology transfer to other engines, and the essential qualities of good software engineering practices for building expert knowledge-based systems are among the topics discussed

    A Reconfigurable Outer Modem Platform for Future Communications Systems

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    Future mobile and wireless communications networks require flexible modem architectures with high performance. Efficient utilization of application specific flexibility is key to fulfill these requirements. For high throughput a single processor can not provide the necessary computational power. Hence multi-processor architectures become necessary. This paper presents a multi-processor platform based on a new dynamically reconfigurable application specific instruction set processor (dr-ASIP) for the application domain of channel decoding. Inherently parallel decoding tasks can be mapped onto individual processing nodes. The implied challenging inter-processor communication is efficiently handled by a Network-on-Chip (NoC) such that the throughput of each node is not degraded. The dr-ASIP features Viterbi and Log-MAP decoding for support of convolutional and turbo codes of more than 10 currently specified mobile and wireless standards. Furthermore, its flexibility allows for adaptation to future systems

    Research requirements for development of regenerative engines for helicopters

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    The improved specific fuel consumption of the regenerative engine was compared to a simple-cycle turboshaft engine. The performance improvement and fuel saving are obtained at the expense of increased engine weight, development and production costs, and maintenance costs. Costs and schedules are estimated for the elements of the research and development program. Interaction of the regenerative engine with other technology goals for an advanced civil helicopter is examined, including its impact on engine noise, hover and cruise performance, helicopter empty weight, drive-system efficiency and weight, one-engine-inoperative hover capability, and maintenance and reliability
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