Systems Engineering for Silicon Photonic Devices

The increasing integration of digital information with our daily lives has led to the rise of big data, cloud computing, and the internet of things. The growth in these categories will lead to an exponential increase in the required capacity for data centers and high performance computation. Meanwhile, due to bottlenecks in data access caused by the limited energy and bandwidth scalability of electrical interconnects, computational speedup can no longer scale with demand. A better solution is necessary in order to increase computational performance and reduce the carbon footprint of our digital future. People have long thought of photonic interconnects, which can offer higher bandwidth, greater energy efficiency, and orders-of-magnitude distance scalability compared to electrical interconnects, as a solution to the data access bottleneck in chip, board, and datacenter scale networks. Over the past three decades we have seen impressive growth of photonic technology from theoretical predictions to high-performance commercially available devices. However, the dream of an all-optical interconnection network for use in CPU, Memory, and rack-to-rack datacenter interconnects is not yet realized. Many challenges and obstacles still have to be addressed. This work investigates these challenges and describe some of the ways to overcome them. First we will first examine the pattern sensitivity of microring modulators, which are likely to be found as the first element in an optical interconnect. My work will illustrate the advantage of using depletion mode modulators compared to injection mode modulators as the number of consecutive symbols in the data pattern increases. Next we will look at the problem of thermal initialization for microring demultiplexers near the output of the optical interconnect. My work demonstrates the fastest achieved initialization speed to-date for a microring based demultiplexer. I will also explore an thermal initialization and control method for microrings based on temperature measurement using a pn-junction. Finally, we will look at how to control and initialize microring and MZI based optical switch fabrics, which is the second element found in a optical interconnect. Work here will show the possibility of switching high-speed WDM datastreams through microring based switches, as well as methods to deal with the complexities inherent in control and initialization of high-radix switch topologies. Through these demonstrations I hope to show that the challenges facing optical interconnects, although very real, are surmountable using reasonable engineering efforts

Ultralow-crosstalk, strictly non-blocking microring-based optical switch

We report on the first monolithically integrated microring-based optical switch in the switch-and-select architecture. The switch fabric delivers strictly non-blocking connectivity while completely canceling the first-order crosstalk. The 4×4 switching circuit consists of eight silicon microring-based spatial (de-)multiplexers interconnected by a Si/SiN dual-layer crossing-free central shuffle. Analysis of the on-state and off-state power transfer functions reveals the extinction ratios of individual ring resonators exceeding 25 dB, leading to switch crosstalk suppression of up to over 50 dB in the switch-and-select topology. Optical paths are assessed, showing losses as low as 0.1 dB per off-resonance ring and 0.5 dB per on-resonance ring. Photonic switching is actuated with integrated micro-heaters to give an ∼24  GHz passband. The fully packaged device is flip-chip bonded onto a printed circuit board breakout board with a UV-curved fiber array

Silicon photonic switching: from building block design to intelligent control

The rapid growth in data communication technologies is at the heart of enriching the digital experiences for people around the world. Encoding high bandwidth data to the optical domain has drastically changed the bandwidth-distance trade-off imposed by electrical media. Silicon photonics, sharing the technological maturity of the semiconductor industry, is a platform poised to make optical interconnect components more robust, manufacturable, and ubiquitous. One of the most prominent device classes enabled by the silicon photonics platform is photonic switching, which describes the direct routing of optical signal carriers without the optical-electrical-optical conversions. While theoretical designs and prototypes of monolithic silicon photonic switch devices have been studied, realizing high-performance and feasible switch systems requires explorations of all design aspects from basic building blocks to control systems. This thesis provides a holistic collection of studies on silicon photonic switching in topics of novel switching element designs, multi-stage switch architectures, device calibration, topology scalability, smart routing strategies, and performance-aware control plane. First, component designs for assembling a silicon photonic switch device are presented. Structures that perform 2×2 optical switching functions are introduced. To realize switching granularities in both spatial and spectral domains, a resonator-assisted Mach-Zehnder interferometer design is demonstrated with high performance and design robustness. Next, multi-stage monolithic switching devices with microring resonator-based switching elements are investigated. An 8×8 switch device with dual-microring switching elements is presented with a well-balanced set of performance metrics in extinction ratio, crosstalk suppression, and optical bandwidth. Continued scaling in the switch port count requires both an economic increase in the number of switching elements integrated in a device and the preservation of signal quality through the switch fabric. A highly scalable switch architecture based on Clos network with microring switch-and-select sub-switches is presented as a solution to reach high switch radices while addressing key factors of insertion loss, crosstalk, and optical passband to ensure end-to-end switching performance. The thesis then explores calibration techniques to acquire and optimize system-wide control points for integrated silicon switch devices. Applicable to common rearrangeably non-blocking switch topologies, automated procedures are developed to calibrate entire switch devices without the need for built-in power monitors. Using Mach-Zehnder interferometer-based switching elements as a demonstration, calibration techniques for optimal control points are introduced to achieve balanced push-pull drive scheme and reduced crosstalk in switching operations. Furthermore, smart routing strategies are developed based on optical penalty estimations enabled by expedited lightpath characterization procedures. Leveraging configuration redundancies in the switch fabric, the routing strategies are capable of avoiding the worst penalty optical paths and effectively elevate the bottom-line performance of the switch device. Additional works are also presented on enhancing optical system control planes with machine learning techniques to accurately characterize complex systems and identify critical control parameters. Using flexgrid networks as a case study, light-weight machine learning workflows are tailored to devise control strategies for improving spectral power stability during wavelength assignment and defragmentation. This work affirms the efficacy of intelligent control planes to predict system dynamics and drive performance optimizations for optical interconnect systems

Ultra-High Capacity Silicon Photonic Interconnects through Spatial Multiplexing

The market for higher data rate communication is driving the semiconductor industry to develop new techniques of writing at smaller scales, while continuing to scale bandwidth at low power consumption. The question arises of how to continue to sustain this trend. Silicon photonic (SiPh) devices offer a potential solution to the electronic interconnect bandwidth bottleneck. SiPh leverages the technology commensurate of decades of fabrication development with the unique functionality of next-generation optical interconnects. Finer fabrication techniques have allowed for manufacturing physical characteristics of waveguide structures that can support multiple modes in a single waveguide. By refining modal characteristics in photonic waveguide structures, through mode multiplexing with the asymmetric y-junction and microring resonator, higher aggregate data bandwidth is demonstrated via various combinations of spatial multiplexing, broadening applications supported by the integrated platform. The main contributions of this dissertation are summarized as follows. Experimental demonstrations of new forms of spatial multiplexing combined together exhibit feasibility of data transmission through mode-division multiplexing (MDM), mode-division and wavelength-division multiplexing (MDM-WDM), and mode-division and polarization-division multiplexing (MDM-PDM) through a C-band, Si photonic platform. Error-free operation through mode multiplexers and demultiplexers show how data can be viably scaled on multiple modes and with existing spatial domains simultaneously. This work opens up new avenues for scaling bandwidth capacity through leveraging orthogonal domains available on-chip, beyond what had previously been employed like WDM and time-division multiplexing (TDM). Furthermore, we explore expanding device channel support from two to three arms. Finding that a slight mismatch in the third arm can increase crosstalk contributions considerably, especially when increasing data rate, we explore a methodical way to design the asymmetric y-junction device by considering its angles and multiplexer/demultiplexer arm width. By taking into consideration device fabrication variations, we turn towards optimizing device performance post-fabrication. Through ModePROP simulations, optimizing device performance dynamically post-fabrication is analyzed, through either electro-optical or thermo-optical means. By biasing the arm introducing the slight spectral offset, we can quantifiably improve device performance. Scaling bandwidth is experimentally demonstrated through the device at 3 modes, 2 wavelengths, and 40 Gb/s data rate for 240 Gb/s aggregate bandwidth, with the potential to reduce power penalty per the device optimization process we described. A main motivation for this on-chip spatial multiplexing is the need to reduce costs. As the laser source serves as the greatest power consumer in an optical system, mode-division multiplexing and other forms of spatial multiplexing can be implemented to push its potentially prohibitive cost metrics down. While the device introduces loss, through imperfect mode isolation, as device fabrication improves, tolerance can increase as well. Meanwhile, the rate that laser power consumption increases as supported wavelengths scales is shown to be much faster than the loss introduced by scaling on-chip bandwidth multi-modally. Future generations of ultra-high capacity devices through spatial multiplexing is explored. Already various systems can be implemented multimodally, with the design features serving as useful for other components. Central to photonic network-on-chips, a multimodal switch fabric, composed of microring resonators, is demonstrated to have error-free operation of 1x2 switching of 10 Gb/s data. These contributions aim to scale bandwidth to ultra-high capacity, while ameliorating any imperfect design, through multiple routes conjoined with on-chip spatial multiplexing, and they constitute the bulk of this dissertation. For the latter part, we turn to the issue of integrating a photonic device for dynamic power reallocation in a system. Specifically, we utilize a 4x4 nonblocking switch fabric composed of Mach-Zehnder interferometers that switch both electro-optically and thermo-optically at ns and μs rates respectively. In order to demonstrate an intelligent platform capable of dynamically multicasting data and reallocating power as needed by the system, we must first initialize the switch fabric to control with an electronic interface. A dithering mechanism, whereby exact cross, bar, and sub-percentage states are enforced through the device, is described here. Such a method could be employed for actuating the device table of bias values to states automatically. We then employ a dynamic power reallocation algorithm through a data acquisition unit, showing real-time channel recovery for channels experiencing power loss by diverting power from paths that could tolerate it. The data that is being multicast through the system is experimentally shown to be error-free at 40 Gb/s data rate, when transmitting from one to three clients and going from automatic bar/cross states to equalized power distribution. For the last portion of this topic, the switch fabric was inserted into a high-performance computing system. In order to run benchmarks at 10 Gb/s data ontop of the switch fabric, a newer model of the control plane was implemented to toggle states according to the command issued by the server. Such a programmable mechanism will prove necessary in future implementations of optical subsystems embedded inside larger systems, like data centers. Beyond the specific control plane demonstrated, the idea of an intelligent photonic layer can be applied to alleviate many kinds of optical channel abnormalities or accommodate for switching based on different patterns in data transmission. Besides spatial-multiplexing, expanding on-chip bandwidth can be accomplished by extension of the wavelength detection regime to a longer regime. Experimental demonstration of photodetection at 1.9 μm is shown with Si+-doped Si photodetectors at 1 Gb/s data operation featuring responsivities of .03 AW−1 at 5 V bias. The same way of processing these Si ribbed waveguide photodetectors can garner even longer wavelength operation at 2.2 μm wavelength. Finally, the experimental demonstration of a coherent perfect absorption Si modulator is exhibited, showing a viable extinction ratio of 24.5 dB. Using this coherent perfect absorption mechanism to demodulate signals, there is the added benefit of differential reception. Currently, an automated process for data collection is employed at a faster time scale than instabilities present in fibers in the setup with future implementations eliminating the off-chip phase modulator for greater signal stability. The field of SiPh has developed to a stage where specific application domains can take off and compete according to industrial-level standards. The work in this dissertation contributes to experimental demonstration of a newly developing area of mode-division multiplexing for substantially increasing bandwidth on-chip. While implementing the discussed photonic devices in dynamic systems, various attributes of integrated photonics are leveraged with existing electronic technologies. Future generations of computing systems should then be designed by implementing both system and device level considerations

Design Space Exploration and Resource Management of Multi/Many-Core Systems

The increasing demand of processing a higher number of applications and related data on computing platforms has resulted in reliance on multi-/many-core chips as they facilitate parallel processing. However, there is a desire for these platforms to be energy-efficient and reliable, and they need to perform secure computations for the interest of the whole community. This book provides perspectives on the aforementioned aspects from leading researchers in terms of state-of-the-art contributions and upcoming trends