229 research outputs found
High efficiency power amplifiers for modern mobile communications: The load-modulation approach
Modern mobile communication signals require power amplifiers able to maintain very high efficiency in a wide range of output power levels, which is a major issue for classical power amplifier architectures. Following the load-modulation approach, efficiency enhancement is achieved by dynamically changing the amplifier load impedance as a function of the input power. In this paper, a review of the widely-adopted Doherty power amplifier and of the other load-modulation efficiency enhancement techniques is presented. The main theoretical aspects behind each method are introduced, and the most relevant practical implementations available in recent literature are reported and discussed
Advanced High Efficiency Architectures for Next Generation Wireless Communications
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Analog dithering techniques for highly linear and efficient transmitters
The current thesis is about investigation of new methods and techniques to be able to utilize the switched mode amplifiers, for linear and efficient applications. Switched mode amplifiers benefit from low overlap between the current and voltage wave forms in their output terminals, but they seriously suffer from nonlinearity. This makes it impossible to use them to amplify non-constant envelope message signals, where very high linearity is expected. In order to do that, dithering techniques are studied and a full linearity analysis approach is developed, by which the linearity performance of the dithered amplifier can be analyzed, based on the dithering level and frequency. The approach was based on orthogonalization of the equivalent nonlinearity and is capable of prediction of both co-channel and adjacent channel nonlinearity metrics, for a Gaussian complex or real input random signal. Behavioral switched mode amplifier models are studied and new models are developed, which can be utilized to predict the nonlinear performance of the dithered power amplifier, including the nonlinear capacitors effects. For HFD application, self-oscillating and asynchronous sigma delta techniques are currently used, as pulse with modulators (PWM), to encode a generic RF message signal, on the duty cycle of an output pulse train. The proposed models and analysis techniques were applied to this architecture in the first phase, and the method was validated with measurement on a prototype sample, realized in 65 nm TSMC CMOS technology. Afterwards, based on the same dithering phenomenon, a new linearization technique was proposed, which linearizes the switched mode class D amplifier, and at the same time can reduce the reactive power loss of the amplifier. This method is based on the dithering of the switched mode amplifier with frequencies lower than the band-pass message signal and is called low frequency dithering (LFD). To test this new technique, two test circuits were realized and the idea was applied to them. Both of the circuits were of the hard nonlinear type (class D) and are integrated CMOS and discrete LDMOS technologies respectively. The idea was successfully tested on both test circuits and all of the linearity metric predictions for a digitally modulated RF signal and a random signal were compared to the measurements. Moreover a search method to find the optimum dither frequency was proposed and validated. Finally, inspired by averaging interpretation of the dithering phenomenon, three new topologies were proposed, which are namely DLM, RF-ADC and area modulation power combining, which are all nonlinear systems linearized with dithering techniques. A new averaging method was developed and used for analysis of a Gilbert cell mixer topology, which resulted in a closed form relationship for the conversion gain, for long channel devices
Digital Pre-distortion for Interference Reduction in Dynamic Spectrum Access Networks
Given the ever increasing reliance of today’s society on ubiquitous wireless access, the paradigm of dynamic spectrum access (DSA) as been proposed and implemented for utilizing the limited wireless spectrum more efficiently. Orthogonal frequency division multiplexing (OFDM) is growing in popularity for adoption into wireless services employing DSA frame- work, due to its high bandwidth efficiency and resiliency to multipath fading. While these advantages have been proven for many wireless applications, including LTE-Advanced and numerous IEEE wireless standards, one potential drawback of OFDM or its non-contiguous variant, NC-OFDM, is that it exhibits high peak-to-average power ratios (PAPR), which can induce in-band and out-of-band (OOB) distortions when the peaks of the waveform enter the compression region of the transmitter power amplifier (PA). Such OOB emissions can interfere with existing neighboring transmissions, and thereby severely deteriorate the reliability of the DSA network. A performance-enhancing digital pre-distortion (DPD) technique compensating for PA and in-phase/quadrature (I/Q) modulator distortions is proposed in this dissertation. Al- though substantial research efforts into designing DPD schemes have already been presented in the open literature, there still exists numerous opportunities to further improve upon the performance of OOB suppression for NC-OFDM transmission in the presence of RF front-end impairments. A set of orthogonal polynomial basis functions is proposed in this dissertation together with a simplified joint DPD structure. A performance analysis is presented to show that the OOB emissions is reduced to approximately 50 dBc with proposed algorithms employed during NC-OFDM transmission. Furthermore, a novel and intuitive DPD solution that can minimize the power regrowth at any pre-specified frequency in the spurious domain is proposed in this dissertation. Conventional DPD methods have been proven to be able to effectively reduce the OOB emissions that fall on top of adjacent channels. However more spectral emissions in more distant frequency ranges are generated by employing such DPD solutions, which are potentially in violation of the spurious emission limit. At the same time, the emissions in adjacent channel must be kept under the OOB limit. To the best of the author’s knowledge, there has not been extensive research conducted on this topic. Mathematical derivation procedures of the proposed algorithm are provided for both memoryless nonlinear model and memory-based nonlinear model. Simulation results show that the proposed method is able to provide a good balance of OOB emissions and emissions in the far out spurious domain, by reducing the spurious emissions by 4-5 dB while maintaining the adjacent channel leakage ratio (ACLR) improvement by at least 10 dB, comparing to the PA output spectrum without any DPD
Recent Developments of Dual-Band Doherty Power Amplifiers for Upcoming Mobile Communications Systems
Power amplifiers in modern and future communications should be able to handle different modulation standards at different frequency bands, and in addition, to be compatible with the previous generations. This paper reviews the recent design techniques that have been used to operate dual-band amplifiers and in particular the Doherty amplifiers. Special attention is focused on the design methodologies used for power splitters, phase compensation networks, impedance inverter networks and impedance transformer networks of such power amplifier. The most important materials of the dual-band Doherty amplifier are highlighted and surveyed. The main problems and challenges covering dual-band design concepts are presented and discussed. In addition, improvement techniques to enhance such operations are also exploited. The study shows that the transistor parasitic has a great impact in the design of a dual-band amplifier, and reduction of the transforming ratio of the inverter simplifies the dual-band design. The offset line can be functionally replaced by a Î -network in dual-band design rather than T-network
Analysis and Design of a Transmitter for Wireless Communications in CMOS Technology
The number of wireless devices has grown tremendously over the last decade. Great technology improvements and novel transceiver architectures and circuits have enabled an astonishingly expanding set of radio-frequency applications.
CMOS technology played a key role in enabling a large-scale diffusion of wireless devices due to its unique advantages in cost and integration. Novel digital-intensive transceivers have taken full advantage of CMOS technology scaling predicted by Moore's law. Die-shrinking has enabled ubiquitous diffusion of low-cost, small form factor and low power wireless devices.
However, Radio Frequency (RF) Power Amplifiers (PA) transceiver functionality is historically implemented in a module which is separated from the CMOS core of the transceiver. The PA is traditionally dictating power and battery life of the transceiver, thus justifying its implementation in a tailored technology. By contrast, a fully integrated CMOS transceiver with no external PA would hugely benefit in terms of reduced area and system complexity.
In this work, a fully integrated prototype of a Switched-Capacitor Power Amplifier (SCPA) has been implemented in a 28nm CMOS technology. The SCPA provides the functionalities of a PA and of a Radio-Frequency Digital-to-Analog Converter (RF-DAC) in a monolithic CMOS device. The switching output stage of the SCPA enables this circuital topology to reach high efficiencies and offers excellent power handling capabilities. In this work, the properties of the SCPA are analyzed in an extensive and detailed dissertation.
Nowadays Wireless Communications operate in a very crowded spectrum, with strict coexistence requirements, thus demanding a strong linearity to the RF-DAC section of the SCPA. A great part of the work of designing a good SCPA is in fact designing a good RF-DAC. To enhance RF-DAC linearity, a precision of the timing of the elements up to the ps range is required. The use of a single core-supply voltage in the whole circuit including the CMOS inverter of the switching output stage enables the use of minimum size devices, improving accuracy and speed in the timing of the elements.
The whole circuit operates therefore on low core-supply voltage. Throughout this work, a detailed analysis carefully describes the electromagnetic structures which maximize power and efficiency of low-voltage SCPAs.
Due to layout issues subsequent to limited available voltages, however, there is a practical limitation in the maximum achievable power of low-voltage SCPAs. In this work, a Multi-Port Monolithic Power Combiner (PC) is introduced to overcome this limitation and further enhance total achieved system power. The PC sums the power of a collection of SCPAs to a single output, allowing higher output powers at a high efficiency. Benefits, drawbacks and design of SCPA PCs are discussed in this work.
The implemented circuit features the combination of four differential SCPAs through a four-way monolithic PC and is simulated to obtain a maximum drain efficiency of 44% at a peak output power of 29dBm on 1.1V supply voltage. Extensive spectrum analysis offers full evaluation of system performances. After exploring state-of-the-art possibilities offered by an advanced 28nm CMOS technology, this work predicts through rigorous theoretical analysis the expected evolution of SCPA performances with the scaling of CMOS Technologies. The encouraging forecast further emphasizes the importance of SCPA circuits for the future of high-performance Wireless Communications
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Design and Linearization of Energy Efficiency Power Amplifier in Nonlinear OFDM Transmitter for LTE-5G Applications. Simulation and measurements of energy efficiency power amplifier in the presence of nonlinear OFDM transmitter system and digital predistortion based on Hammerstein-Wiener method
This research work has made an effort to understand a novel line of radio frequency
power amplifiers (RFPAs) that address initiatives for efficiency enhancement and
linearity compensation to harmonize the fifth generation (5G) campaign. The objective
is to enhance the performance of an orthogonal frequency division multiplexing-long
term evolution (OFDM-LTE) transmitter by reducing the nonlinear distortion of the
RFPA.
The first part of this work explores the design and implementation of 15.5 W class AB
RF power amplifier, adopting a balanced technique to stimulate efficiency enhancement
and redeeming exhibition of excessive power in the transmitter. Consequently, this work
goes beyond improving efficiency over a linear RF power amplifier design; in which a
comprehensive investigation on the fundamental and harmonic components of class F
RF power amplifier using a load-pull approach to realise an optimum load impedance
and the matching network is presented. The frequency bandwidth for both amplifiers was
allocated to operate in the 2.620-2.690 GHz of mobile LTE applications.
The second part explores the development of the behavioural model for the class AB
power amplifier. A particular novel, Hammerstein-Wiener based model is proposed to
describe the dynamic nonlinear behaviour of the power amplifier. The RF power amplifier
nonlinear distortion is approximated using a new linear parameter approximation
approach. The first and second-order Hammerstein-Wiener using the Normalised Least
Mean Square Error (NLMSE) algorithm is used with the aim of easing the complexity of
filtering process during linear memory cancellation. Moreover, an enhanced adaptive
Wiener model is proposed to explore the nonlinear memory effect in the system. The
proposed approach is able to balance between convergence speed and high-level
accuracy when compared with behavioural modelling algorithms that are more complex
in computation.
Finally, the adaptive predistorter technique is implemented and verified in the OFDM
transceiver test-bed. The results were compared against the computed one from
MATLAB simulation for OFDM and 5G modulation transmitters. The results have
confirmed the reliability of the model and the effectiveness of the proposed predistorter.Fundacão para a Ciência e a Tecnologia, Portugal, under
European Union’s Horizon 2020 research and innovation programme ... grant agreement H2020-MSCA-ITN- 2016 SECRET-722424
I also acknowledge the role of the National Space Research and Development Agency (NASRDA)
Sokoto State Government
Petroleum Technology Trust Fund (PTDF
A study of satellite emergency locator systems
Satellite emergency locator systems were studied. The objective of the study was to determine the feasibility and hardware requirements for satellite systems capable of identifying and locating the position emergency locator transmitters and emergency position indicating radio beacons. Both geosynchronous and near-polar-orbiting satellites were considered. One of the most important aspects of the study was to minimize the cost of the hardware required
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