Multilayer Modeling and Design of Energy Managed Microsystems

Aggressive energy reduction is one of the key technological challenges that all segments of the semiconductor industry have encountered in the past few years. In addition, the notion of environmental awareness and designing “green” products is yet another major driver for ultra low energy design of electronic systems. Energy management is one of the unique solutions that can address the simultaneous requirements of high-performance, (ultra) low energy and greenness in many classes of computing systems; including high-performance, embedded and wireless. These considerations motivate the focus of this dissertation on the energy efficiency improvement of Energy Managed Microsystems (EMM or EM2). The aim is to maximize the energy efficiency and/or the operational lifetime of these systems. In this thesis we propose solutions that are applicable to many classes of computing systems including high-performance and mobile computing systems. These solutions contribute to make such technologies “greener”. The proposed solutions are multilayer, since they belong to, and may be applicable to, multiple design abstraction layers. The proposed solutions are orthogonal to each other, and if deployed simultaneously in a vertical system integration approach, when possible, the net benefit may be as large as the multiplication of the individual benefits. At high-level, this thesis initially focuses on the modeling and design of interconnections for EM2. For this purpose, a design flow has been proposed for interconnections in EM2. This flow allows designing interconnects with minimum energy requirements that meet all the considered performance objectives, in all specified system operating states. Later, models for energy performance estimation of EM2 are proposed. By energy performance, we refer to the improvements of energy savings of the computing platforms, obtained when some enhancements are applied to those platforms. These models are based on the components of the application profile. The adopted method is inspired by Amdahl’s law, which is driven by the fact that ‘energy’ is ‘additive’, as ‘time’ is ‘additive’. These models can be used for the design space exploration of EM2. The proposed models are high-level and therefore they are easy to use and show fair accuracy, 9.1% error on average, when compared to the results of the implemented benchmarks. Finally, models to estimate energy consumption of EM2 according to their “activity” are proposed. By “activity” we mean the rate at which EM2 perform a set of predefined application functions. Good estimations of energy requirements are very useful when designing and managing the EM2 activity, in order to extend their battery lifetime. The study of the proposed models on some Wireless Sensor Network (WSN) application benchmark confirms a fair accuracy for the energy estimation models, 3% error on average on the considered benchmarks

Accuracy-Guaranteed Fixed-Point Optimization in Hardware Synthesis and Processor Customization

RÉSUMÉ De nos jours, le calcul avec des nombres fractionnaires est essentiel dans une vaste gamme d’applications de traitement de signal et d’image. Pour le calcul numérique, un nombre fractionnaire peut être représenté à l’aide de l’arithmétique en virgule fixe ou en virgule flottante. L’arithmétique en virgule fixe est largement considérée préférable à celle en virgule flottante pour les architectures matérielles dédiées en raison de sa plus faible complexité d’implémentation. Dans la mise en œuvre du matériel, la largeur de mot attribuée à différents signaux a un impact significatif sur des métriques telles que les ressources (transistors), la vitesse et la consommation d'énergie. L'optimisation de longueur de mot (WLO) en virgule fixe est un domaine de recherche bien connu qui vise à optimiser les chemins de données par l'ajustement des longueurs de mots attribuées aux signaux. Un nombre en virgule fixe est composé d’une partie entière et d’une partie fractionnaire. Il y a une limite inférieure au nombre de bits alloués à la partie entière, de façon à prévenir les débordements pour chaque signal. Cette limite dépend de la gamme de valeurs que peut prendre le signal. Le nombre de bits de la partie fractionnaire, quant à lui, détermine la taille de l'erreur de précision finie qui est introduite dans les calculs. Il existe un compromis entre la précision et l'efficacité du matériel dans la sélection du nombre de bits de la partie fractionnaire. Le processus d'attribution du nombre de bits de la partie fractionnaire comporte deux procédures importantes: la modélisation de l'erreur de quantification et la sélection de la taille de la partie fractionnaire. Les travaux existants sur la WLO ont porté sur des circuits spécialisés comme plate-forme cible. Dans cette thèse, nous introduisons de nouvelles méthodologies, techniques et algorithmes pour améliorer l’implémentation de calculs en virgule fixe dans des circuits et processeurs spécialisés. La thèse propose une approche améliorée de modélisation d’erreur, basée sur l'arithmétique affine, qui aborde certains problèmes des méthodes existantes et améliore leur précision. La thèse introduit également une technique d'accélération et deux algorithmes semi-analytiques pour la sélection de la largeur de la partie fractionnaire pour la conception de circuits spécialisés. Alors que le premier algorithme suit une stratégie de recherche progressive, le second utilise une méthode de recherche en forme d'arbre pour l'optimisation de la largeur fractionnaire. Les algorithmes offrent deux options de compromis entre la complexité de calcul et le coût résultant. Le premier algorithme a une complexité polynomiale et obtient des résultats comparables avec des approches heuristiques existantes. Le second algorithme a une complexité exponentielle, mais il donne des résultats quasi-optimaux par rapport à une recherche exhaustive. Cette thèse propose également une méthode pour combiner l'optimisation de la longueur des mots dans un contexte de conception de processeurs configurables. La largeur et la profondeur des blocs de registres et l'architecture des unités fonctionnelles sont les principaux objectifs ciblés par cette optimisation. Un nouvel algorithme d'optimisation a été développé pour trouver la meilleure combinaison de longueurs de mots et d'autres paramètres configurables dans la méthode proposée. Les exigences de précision, définies comme l'erreur pire cas, doivent être respectées par toute solution. Pour faciliter l'évaluation et la mise en œuvre des solutions retenues, un nouvel environnement de conception de processeur a également été développé. Cet environnement, qui est appelé PolyCuSP, supporte une large gamme de paramètres, y compris ceux qui sont nécessaires pour évaluer les solutions proposées par l'algorithme d'optimisation. L’environnement PolyCuSP soutient l’exploration rapide de l'espace de solution et la capacité de modéliser différents jeux d'instructions pour permettre des comparaisons efficaces.----------ABSTRACT Fixed-point arithmetic is broadly preferred to floating-point in hardware development due to the reduced hardware complexity of fixed-point circuits. In hardware implementation, the bitwidth allocated to the data elements has significant impact on efficiency metrics for the circuits including area usage, speed and power consumption. Fixed-point word-length optimization (WLO) is a well-known research area. It aims to optimize fixed-point computational circuits through the adjustment of the allocated bitwidths of their internal and output signals. A fixed-point number is composed of an integer part and a fractional part. There is a minimum number of bits for the integer part that guarantees overflow and underflow avoidance in each signal. This value depends on the range of values that the signal may take. The fractional word-length determines the amount of finite-precision error that is introduced in the computations. There is a trade-off between accuracy and hardware cost in fractional word-length selection. The process of allocating the fractional word-length requires two important procedures: finite-precision error modeling and fractional word-length selection. Existing works on WLO have focused on hardwired circuits as the target implementation platform. In this thesis, we introduce new methodologies, techniques and algorithms to improve the hardware realization of fixed-point computations in hardwired circuits and customizable processors. The thesis proposes an enhanced error modeling approach based on affine arithmetic that addresses some shortcomings of the existing methods and improves their accuracy. The thesis also introduces an acceleration technique and two semi-analytical fractional bitwidth selection algorithms for WLO in hardwired circuit design. While the first algorithm follows a progressive search strategy, the second one uses a tree-shaped search method for fractional width optimization. The algorithms offer two different time-complexity/cost efficiency trade-off options. The first algorithm has polynomial complexity and achieves comparable results with existing heuristic approaches. The second algorithm has exponential complexity but achieves near-optimal results compared to an exhaustive search. The thesis further proposes a method to combine word-length optimization with application-specific processor customization. The supported datatype word-length, the size of register-files and the architecture of the functional units are the main target objectives to be optimized. A new optimization algorithm is developed to find the best combination of word-length and other customizable parameters in the proposed method. Accuracy requirements, defined as the worst-case error bound, are the key consideration that must be met by any solution. To facilitate evaluation and implementation of the selected solutions, a new processor design environment was developed. This environment, which is called PolyCuSP, supports necessary customization flexibility to realize and evaluate the solutions given by the optimization algorithm. PolyCuSP supports rapid design space exploration and capability to model different instruction-set architectures to enable effective compari

OIL SPILL MODELING FOR IMPROVED RESPONSE TO ARCTIC MARITIME SPILLS: THE PATH FORWARD

Maritime shipping and natural resource development in the Arctic are projected to increase as sea ice coverage decreases, resulting in a greater probability of more and larger oil spills. The increasing risk of Arctic spills emphasizes the need to identify the state-of-the-art oil trajectory and sea ice models and the potential for their integration. The Oil Spill Modeling for Improved Response to Arctic Maritime Spills: The Path Forward (AMSM) project, funded by the Arctic Domain Awareness Center (ADAC), provides a structured approach to gather expert advice to address U.S. Coast Guard (USCG) Federal On-Scene Coordinator (FOSC) core needs for decision-making. The National Oceanic & Atmospheric Administration (NOAA) Office of Response & Restoration (OR&R) provides scientific support to the USCG FOSC during oil spill response. As part of this scientific support, NOAA OR&R supplies decision support models that predict the fate (including chemical and physical weathering) and transport of spilled oil. Oil spill modeling in the Arctic faces many unique challenges including limited availability of environmental data (e.g., currents, wind, ice characteristics) at fine spatial and temporal resolution to feed models. Despite these challenges, OR&R’s modeling products must provide adequate spill trajectory predictions, so that response efforts minimize economic, cultural and environmental impacts, including those to species, habitats and food supplies. The AMSM project addressed the unique needs and challenges associated with Arctic spill response by: (1) identifying state-of-the-art oil spill and sea ice models, (2) recommending new components and algorithms for oil and ice interactions, (3) proposing methods for improving communication of model output uncertainty, and (4) developing methods for coordinating oil and ice modeling efforts

Engaging Teachers in Agile School Improvement

This Organizational Improvement Plan addresses a K-6 principal’s leadership challenge of engaging teachers in implementing the strategies from the annual school improvement plan in a changing school context. The inquiry questions focus on increasing teacher voice, enabling collaborative professional learning, and facilitating dynamic organizational change. Drawing from complexity theory, School X is conceived as a complex adaptive system that exists within a broader eco-system, with organizational transformation occurring through complex responsive processes where human interactions and diversity are essential for shifting current thinking and behaviors. The principal proposes an authentic/adaptive leadership approach that integrates two change models to develop the Dynamic Innovative Generative change framework to lead teachers in a system-oriented and locally adapted process where teachers participate as leaders and co-creators of school improvement. A collaborative, short-term action planning protocol enables teachers to engage in student-centered, collaborative, and impactful school and practice improvement. This proposed solution addresses the current low level of readiness for teachers to engage in creative and collaborative professional learning. Supporting the principal in implementing the changes in this OIP is a detailed communication plan and strategies for adapting decisions and leading an agile school improvement process

Cost-Efficient Soft-Error Resiliency for ASIP-based Embedded Systems

Recent decades have witnessed the rapid growth of embedded systems. At present, embedded systems are widely applied in a broad range of critical applications including automotive electronics, telecommunication, healthcare, industrial electronics, consumer electronics military and aerospace. Human society will continue to be greatly transformed by the pervasive deployment of embedded systems. Consequently, substantial amount of efforts from both industry and academic communities have contributed to the research and development of embedded systems. Application-specific instruction-set processor (ASIP) is one of the key advances in embedded processor technology, and a crucial component in some embedded systems. Soft errors have been directly observed since the 1970s. As devices scale, the exponential increase in the integration of computing systems occurs, which leads to correspondingly decrease in the reliability of computing systems. Today, major research forums state that soft errors are one of the major design technology challenges at and beyond the 22 nm technology node. Therefore, a large number of soft-error solutions, including error detection and recovery, have been proposed from differing perspectives. Nonetheless, most of the existing solutions are designed for general or high-performance systems which are different to embedded systems. For embedded systems, the soft-error solutions must be cost-efficient, which requires the tailoring of the processor architecture with respect to the feature of the target application. This thesis embodies a series of explorations for cost-efficient soft-error solutions for ASIP-based embedded systems. In this exploration, five major solutions are proposed. The first proposed solution realizes checkpoint recovery in ASIPs. By generating customized instructions, ASIP-implemented checkpoint recovery can perform at a finer granularity than what was previously possible. The fault-free performance overhead of this solution is only 1.45% on average. The recovery delay is only 62 cycles at the worst case. The area and leakage power overheads are 44.4% and 45.6% on average. The second solution explores utilizing two primitive error recovery techniques jointly. This solution includes three application-specific optimization methodologies. This solution generates the optimized error-resilient ASIPs, based on the characteristics of primitive error recovery techniques, static reliability analysis and design constraints. The resultant ASIP can be configured to perform at runtime according to the optimized recovery scheme. This solution can strategically enhance cost-efficiency for error recovery. In order to guarantee cost-efficiency in unpredictable runtime situations, the third solution explores runtime adaptation for error recovery. This solution aims to budget and adapt the error recovery operations, so as to spend the resources intelligently and to tolerate adverse influences of runtime variations. The resultant ASIP can make runtime decisions to determine the activation of spatial and temporal redundancies, according to the runtime situations. At the best case, this solution can achieve almost 50x reliability gain over the state of the art solutions. Given the increasing demand for multi-core computing systems, the last two proposed solutions target error recovery in multi-core ASIPs. The first solution of these two explores ASIP-implemented fine-grained process migration. This solution is a key infrastructure, which allows cost-efficient task management, for realizing cost-efficient soft-error recovery in multi-core ASIPs. The average time cost is only 289 machine cycles to perform process migration. The last solution explores using dynamic and adaptive mapping to assign heterogeneous recovery operations to the tasks in the multi-core context. This solution allows each individual ASIP-based processing core to dynamically adapt its specific error recovery functionality according to the corresponding task's characteristics, in terms of soft error vulnerability and execution time deadline. This solution can significantly improve the reliability of the system by almost two times, with graceful constraint penalty, in comparison to the state-of-the-art counterparts

Uudsete meetodite arendamine ligandide s idumisomaduste uurimiseks melanokortiini 4 retseptorile

Väitekirja elektrooniline versioon ei sisalda publikatsioone.Käesolev doktoritöö „Uudsete meetodite arendamine ligandide sidumisomaduste uurimiseks melanokortiini 4 retseptorile“ käsitleb uuringutega, mille üheks eesmärgiks oli fluorestsentsil põhinevate katsesüsteemide väljatöötamine, mida saaks kasutada uute melanokortiini retseptorite spetsiifiliste ligandide avastamiseks. Melanokortiini retseptorid osalevad mitmete oluliste füsioloogiliste funktsioonide regulatsioonil nagu pigmentatsioon, seksuaal- ja toitumiskäitumine, energiatasakaalu reguleerimine, valu ja keha temperatuuri reguleerimine, immuunsed ja põletikuvastased reaktsioonid, jne. Seega on melanokortiini retseptoritele spetsiifilised ligandid perspektiivsed ravimikandidaadid selliste haiguste ravimiseks nagu rasvumine ja anoreksia, melanoom, erektsiooni ja seksuaalsuse häired, aga ka ärevushäired ning depressioon. Uute tõhusate ravimite leidmine sõltub suurel määral ka meie teadmistest retseptor-ligandide vastasmõju mehhanisme kohta ning oskusest kasutada neid teadmisi uudsete efektiivsete raviainete disainimiseks. Lisaks sellele, oleneb tihti ka meetodist, mis on antud juhul meie „silmadeks“ selles katsesüsteemis, millist toimeaine mõju me üldse näeme ja kui hästi me seda detekteerida ning iseloomustada suudame. Siin töös arendatud uudsed fluorestsentsil põhinevad kastesüsteemid võimaldavad loobuda radioaktiivsete ühendite kasutamisest ning jälgida retseptor-ligandi vastasmõjusid reaalajas. See võimaldab saada täiendavat informatsiooni melanokortiinse süsteemi funktsioneerimise kohta, aga ka luua automatiseeritud katsesüsteem uute aktiivsete ühendite leidmiseks.Current PhD thesis “Development of assay systems for characterisation of ligand binding properties to melanocortin 4 receptors” describes our progress of melanocortin receptor studies connected with development of novel assay systems that would facilitate the discovery of novel receptor specific ligands. Melanocortin receptors are involved in regulation of wide variety of physiological functions like pigmentation, sexual behaviour, regulation of energy balance and feeding behaviours, temperature control and pain sense, inflammatory and immune responses and others. Thus, ligands for these receptors have a remarkable therapeutic potential for treatment of several human disorders like obesity and anorexia, melanoma, erectile dysfunction and sexual motivation, as well as anxiety and depression. Success in discovery of new drugs, in many aspects depends from our ability to understand the mechanisms of receptor-ligand interactions and use this to design novel, receptor subtype selective, potent and metabolically suitable drugs. Besides that, assay properties may play a very important role in interpretation of results, as the ability to see the effect of the drug depends on the “eyes” of the assay through which it is monitored. Fluorescence anisotropy-based assay systems we developed avoid the use of radioactive ligands and allow on-line monitoring of receptor-ligand interactions that would improve general understanding of the melanocortin system

Developing student mental toughness: the potential impact of autonomy support from teachers

Developing Student Mental Toughness: The Potential Impact of Autonomy Support from Teachers Harte, E., Brophy, T., & Perry, J. (2020) Background: Mental toughness (MT) is a personality trait which supports an individual to overcome obstacles and perform in challenging situations. As a construct, MT shares similarities with resilience and psychological hardiness. In an educational context, benefits associated with high perceptions of MT include increased engagement, better attainments, improved attendance and fewer incidences of disruptive behaviour. Aim: The study investigated the impact of increased autonomy support (AS) from teachers, through participation in an Autonomy-Supportive Intervention Programme (ASIP), on teachers’ and students’ perceptions of AS along with students’ perceptions of their MT. Method: There were two parts to the study. Part one related to the participation of teachers (n = 15), assigned to either an intervention or waitlist control group, in an ASIP focused on how to support students’ autonomy, in line with self-determination theory. The ASIP was delivered over ten weeks using a workshop format. Employing selfreport measures and classroom observations, teachers’ use of autonomy-supportive instructional behaviours in their practice was recorded. In measuring perceptions of AS pre- and post-intervention, teachers completed an adapted version of the Learning Climate Questionnaire (LCQ) teacher scale. Qualitative data related to teachers’ experiences of the ASIP was also collected and analysed as a feasibility study. Part two related to students’ perceptions of AS and MT. Pre- and post-intervention, students (n = 301) completed an adapted version of the LCQ student scale to assess their perceived level of AS in school while their perceptions of MT were measured using the MTQPlus. Results: A Wilcoxon Signed-Rank Test and ANCOVAs were conducted on the data collected from the teachers and students. Results showed that there was no significant increase in perceptions of AS for teachers in the intervention group. When accounting for gender and school type, statistically significant interaction effects for students’ perceptions of AS were evident. There were no significant changes in students’ perceptions of MT. Conclusions: Results indicated a deceleration of decline in perceptions of AS in female students and students attending school in a rural setting following teachers’ participation in the ASIP when compared to the control group. Results did not support the use of the intervention in developing student MT. Implications for teachers, psychologists and allied professionals are considered. Keywords: Autonomy, autonomy-supportive intervention programme (ASIP), mental toughness, mental toughness development, self-determination theory.N