An Adaptive Design Methodology for Reduction of Product Development Risk

Embedded systems interaction with environment inherently complicates understanding of requirements and their correct implementation. However, product uncertainty is highest during early stages of development. Design verification is an essential step in the development of any system, especially for Embedded System. This paper introduces a novel adaptive design methodology, which incorporates step-wise prototyping and verification. With each adaptive step product-realization level is enhanced while decreasing the level of product uncertainty, thereby reducing the overall costs. The back-bone of this frame-work is the development of Domain Specific Operational (DOP) Model and the associated Verification Instrumentation for Test and Evaluation, developed based on the DOP model. Together they generate functionally valid test-sequence for carrying out prototype evaluation. With the help of a case study 'Multimode Detection Subsystem' the application of this method is sketched. The design methodologies can be compared by defining and computing a generic performance criterion like Average design-cycle Risk. For the case study, by computing Average design-cycle Risk, it is shown that the adaptive method reduces the product development risk for a small increase in the total design cycle time.Comment: 21 pages, 9 figure

Embedded Systems Requirements Verification Using HiLeS Designer

International audienceOne of the issues related to systems design is the early verification in first design steps: system specifications verification. Nowadays, it is common to use text-based specifications to begin a system design. However, these specifications cannot be verified until a software model is made. In this work, we show how can we use HiLeS Designer to model and verify, formally and by simulation an embedded system specification. This tool makes easier to build the model, using graphical concepts which are familiar to designers. It also helps to verify formally the structure and some logical behavior, and by simulation, it is possible to verify the consistence of the embedded system specification. We model and verify System Display Selector Requirements applying HiLeS Designer

Beiträge zur Automatisierung der frühen Entwurfsphasen verteilter Systeme

With the rapid increasing speed of electronic devices systems with highercomplexity, interconnectedness and heterogeneity can be developed. The developmentof such systems can only be done by teams of specialists. Atthe same time the development needs to happen in parallel to ensure anearly time to market. Therefore in the traditional design process the designis described in form of a written specification of the common system andpartitioned to several teams. This takes place in early design stages at highproduct uncertainty. Sub system development assumptions and decisions aremade without being able to evaluate the effect on the common system. Thusmany critical errors, especially those, caused by coupling effects, are discoveredduring system integration at the end of the design process. Furthermorean optimization of the common system is not possible, because of the lack ofa common system model. Hence the traditional design process is a high riskdevelopment process. In the Mission Level Design approach, an executable specification of thecommon system instead of a written specification is developed after conceptdevelopment. These is validated and optimized against the requirements ofthe common system. The such validated specification of the coupled systemis then passed on to specialist teams for sub system development. The subsystems are then integrated. In this manner integration problems can besolved in the early design stages. Development time and risk can be reducedsignificantly. To increase the specification quality and speed while developing common systemmodels, in the present work, standardized methods for specification andperformance evaluation of distributed systems and methods for automatedmapping of function into architecture are developed. This allows architectureoptimization of the common system in the early design stages. In addition,methods for transformation of the abstract design into implementations aredeveloped.Mit der rapide steigenden Geschwindigkeit elektronischer Bauelemente könnenSysteme mit erhöhter Komplexität, Vernetzung und Heterogenität entwickeltwerden. Dies hat zur Folge, dass eine Entwicklung nur durch Teamsvon Spezialisten durchführbar ist. Gleichzeitig muss die Entwicklung parallelerfolgen, um eine möglichst frühzeitige Produkteinführung zu ermöglichen.Im traditionellen Entwurfsprozess wird daher der Entwurf in Form einer geschriebenenSpezifikation des Gesamtsystems erfasst und anschließend aufmehrere Teams aufgeteilt. Dies erfolgt in den frühen Entwurfsphasen, welchedurch eine hohe Unsicherheit über das Produkt gekennzeichnet sind. Dabeimüssen bei der Entwicklung der Subsysteme Annahmen und Entscheidungengetroffen werden, ohne den Einfluss auf das Gesamtsystem abschätzenzu können. Kopplungseffekte werden weitestgehend ignoriert. Viele kritische,insbesondere durch Kopplungseffekte hervorgerufene Fehler, können folglicherst bei der Integration am Ende der Entwicklung entdeckt werden. Zudem isteine Optimierung des Gesamtsystems nicht möglich, da kein Gesamtsystemmodellvorliegt. Der traditionelle Entwurfsprozess besitzt daher ein hohesEntwicklungsrisiko. Beim Entwurfsansatz Mission Level Design wird nach dem Konzeptentwurfanstatt einer geschriebenen eine ausführbare Spezifikation des Gesamtsystemsentwickelt. Diese wird gegen die Gesamtsystemanforderungen validiertund optimiert. Daraufhin wird die Spezifikation des gekoppelten Gesamtsystemsan mehrere Teams zur Entwicklung der Subsysteme weitergegeben,welche dann wieder zu einem Gesamtsystem integriert werden. Integrationsproblemewerden so schon in den frühen Entwurfsphasen gelöst, was einewesentliche Verringerung von Entwicklungszeit und -risiko bewirkt. Um die Spezifikationsqualität und -geschwindigkeit bei der Entwicklung vonGesamtsystemmodellen zu erhöhen, werden im Rahmen der Arbeit standardisierteMethoden zur Beschreibung und Leistungsbewertung verteilterSysteme, sowie zum automatisierten Mapping von Funktion in Architekturentwickelt. Dies ermöglicht bereits in den frühen Entwurfsphasen eine Architekturoptimierungdes Gesamtsystems. Zusätzlich werden Methoden zurÜberführung des abstrakten Entwurfs in Implementationen entwickelt

System-Level Modeling of a NoC-Based H.264 Decoder

Abstract -Networks-on-chip (NoC) are expected to play a key role in future embedded systems. A NoC-based system has the potential to support concurrent processing, in both software and hardware. This can however lead to concurrency issues. We present a multiprocessor system modeling and performance evaluation approach that addresses concurrency. We illustrate our methodology by mapping a H.264 decoder onto a 4×3 meshbased NoC architecture. We show latency, area, and power consumption results for this NoC architecture abstracted from its FPGA implementation