Offset mismatch calibration for TI-ADCs in high-speed OFDM systems

Time-interleaved analog-to-digital converters (TIADCs) are widely used for multi-Gigabit orthogonal frequency division multiplexing (OFDM) based systems because of their attractive high sampling rate and high resolution. However, when not perfectly calibrated, mismatches such as offset mismatch, gain mismatch and timing mismatch between parallel sub-ADCs can significantly degrade the system performance. In this paper, we focus on offset mismatch. We analyze two calibration techniques for the offset mismatch, based on the least-squares (LS) and linear minimum mean-squared error (LMMSE) algorithms assuming an AWGN channel. The simulation results show that our method is capable of improving the BER performance. As expected, the LMMSE estimator outperforms the LS estimator. However, at large offset mismatch levels or low noise level, both estimators converge. In this paper, we derive the condition on the mismatch level for convergence between the two estimators

Joint synchronization and calibration of multi-channel transform-domain charge sampling receivers

Transform-domain (TD) sampling is seen as a potential candidate for wideband and ultra-wideband high-performance receivers and is investigated in detail in this research. TD receivers expand the signal over a set of basis functions and operate on the digitized basis coefficients. This parallel digital signal processing relaxes the sampling requirements opening the doors to higher dynamic range and wider bandwidth in receivers. This research is focused on the implementation of a high performance multi-channel wideband receiver that is based on Frequency-domain (FD) sampling, a special case of TD sampling. To achieve high dynamic ranges in these receivers, it is critical that the digital post processing block matches the analog RF front end accurately. This accurate matching has to be ensured across several process variations, mismatches and o�sets that can be present in integrated circuit implementations. A unified model has been defined for the FD multi-channel receiver that contains all these imperfections and a joint synchronization and calibration technique, based on the Least-mean-squared (LMS) algorithm, is presented to track them. A maximum likelihood (ML) algorithm is used to estimate the frequency offset in carriers which is corrected prior to LMS calibration. Simulation results are provided to support these concepts. The sampling circuits in FD receivers are based on charge-sampling and a multi-channel charge-sampling receiver creates an inherent sinc filter-bank that has several advantages compared to the conventional analog filter banks used in other multi-channel receivers. It is shown that the sinc filter banks, besides reduced analog complexity, have very low computational complexity in data estimation which greatly reduces the digital power consumption of these filters. The digital complexity of data estimation in the sinc fiter bank is shown to be less than 1=10th of the complexity in analog filter banks

Sub-Nyquist Channel Estimation over IEEE 802.11ad Link

Nowadays, millimeter-wave communication centered at the 60 GHz radio frequency band is increasingly the preferred technology for near-field communication since it provides transmission bandwidth that is several GHz wide. The IEEE 802.11ad standard has been developed for commercial wireless local area networks in the 60 GHz transmission environment. Receivers designed to process IEEE 802.11ad waveforms employ very high rate analog-to-digital converters, and therefore, reducing the receiver sampling rate can be useful. In this work, we study the problem of low-rate channel estimation over the IEEE 802.11ad 60 GHz communication link by harnessing sparsity in the channel impulse response. In particular, we focus on single carrier modulation and exploit the special structure of the 802.11ad waveform embedded in the channel estimation field of its single carrier physical layer frame. We examine various sub-Nyquist sampling methods for this problem and recover the channel using compressed sensing techniques. Our numerical experiments show feasibility of our procedures up to one-seventh of the Nyquist rates with minimal performance deterioration.Comment: 5 pages, 5 figures, SampTA 2017 conferenc

An identification of the tolerable time-interleaved analog-to-digital converter timing mismatch level in high-speed orthogonal frequency division multiplexing systems

High-speed Terahertz communication systems has recently employed orthogonal frequency division multiplexing approach as it provides high spectral efficiency and avoids inter-symbol interference caused by dispersive channels. Such high-speed systems require extremely high-sampling time-interleaved analog-to-digital converters at the receiver. However, timing mismatch of time-interleaved analog-to-digital converters significantly causes system performance degradation. In this paper, to avoid such performance degradation induced by timing mismatch, we theoretically determine maximum tolerable mismatch levels for orthogonal frequency division multiplexing communication systems. To obtain these levels, we first propose an analytical method to derive the bit error rate formula for quadrature and pulse amplitude modulations in Rayleigh fading channels, assuming binary reflected gray code (BRGC) mapping. Further, from the derived bit error rate (BER) expressions, we reveal a threshold of timing mismatch level for which error floors produced by the mismatch will be smaller than a given BER. Simulation results demonstrate that if we preserve mismatch level smaller than 25% of this obtained threshold, the BER performance degradation is smaller than 0.5 dB as compared to the case without timing mismatch

Pilot-Based TI-ADC Mismatch Error Calibration for IR-UWB Receivers

In this work, we rst provide an overviewof the state of the art in mismatch error estimation and correction for time-interleaved analog to digital converters (TI-ADCs). Then, we present a novel pilot-based on-line adaptive timing mismatch error estimation approach for TI-ADCs in the context of an impulse radio ultra wideband (IR-UWB) receiver with correlation-based detection. We introduce the developed method and derive the expressions for both additive white Gaussian noise (AWGN) and Rayleigh multipath fading (RMPF) channels. We also derive a lower bound on the required ADC resolution to attain a certainestimation precision. Simulations show the effectiveness of the technique when combined with an adequate compensator. We analyze the estimation error behavior as a function of signal to noise ratio (SNR) and investigate the ADC performance before and after compensation. While all mismatches combined cause the effective number of bits (ENOB) to drop to 3 bits and to 6 bits when considering only timing mismatch, estimation and correction of these errors with the proposed technique can restore a close to ideal behavior.We also show the performance loss at the receiver in terms of bit error rate (BER) and how compensation is able to signicantly improve performance.Fil: Schmidt, Christian Andrés. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages". Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages"; ArgentinaFil: Figueroa, Jose Luis. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages". Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages"; ArgentinaFil: Cousseau, Juan Edmundo. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages". Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages"; ArgentinaFil: Lopez Tonellotto, Mariana Andrea. University Of Klagenfurt; Austri

Pilot-Based TI-ADC Mismatch Error Calibration for IR-UWB Receivers

4openopenSchmidt C.A.; Figueroa J.L.; Cousseau J.E.; Tonello A.M.Schmidt, C. A.; Figueroa, J. L.; Cousseau, J. E.; Tonello, A. M

Design of Analog-to-Digital Converters with Embedded Mixing for Ultra-Low-Power Radio Receivers

In the field of radio receivers, down-conversion methods usually rely on one (or more) explicit mixing stage(s) before the analog-to-digital converter (ADC). These stages not only contribute to the overall power consumption but also have an impact on area and can compromise the receiver’s performance in terms of noise and linearity. On the other hand, most ADCs require some sort of reference signal in order to properly digitize an analog input signal. The implementation of this reference signal usually relies on bandgap circuits and reference buffers to generate a constant, stable, dc signal. Disregarding this conventional approach, the work developed in this thesis aims to explore the viability behind the usage of a variable reference signal. Moreover, it demonstrates that not only can an input signal be properly digitized, but also shifted up and down in frequency, effectively embedding the mixing operation in an ADC. As a result, ADCs in receiver chains can perform double-duty as both a quantizer and a mixing stage. The lesser known charge-sharing (CS) topology, within the successive approximation register (SAR) ADCs, is used for a practical implementation, due to its feature of “pre-charging” the reference signal prior to the conversion. Simulation results from an 8-bit CS-SAR ADC designed in a 0.13 μm CMOS technology validate the proposed technique

System-level design and RF front-end implementation for a 3-10ghz multiband-ofdm ultrawideband receiver and built-in testing techniques for analog and rf integrated circuits

This work consists of two main parts: a) Design of a 3-10GHz UltraWideBand (UWB) Receiver and b) Built-In Testing Techniques (BIT) for Analog and RF circuits. The MultiBand OFDM (MB-OFDM) proposal for UWB communications has received significant attention for the implementation of very high data rate (up to 480Mb/s) wireless devices. A wideband LNA with a tunable notch filter, a downconversion quadrature mixer, and the overall radio system-level design are proposed for an 11-band 3.4-10.3GHz direct conversion receiver for MB-OFDM UWB implemented in a 0.25mm BiCMOS process. The packaged IC includes an RF front-end with interference rejection at 5.25GHz, a frequency synthesizer generating 11 carrier tones in quadrature with fast hopping, and a linear phase baseband section with 42dB of gain programmability. The receiver IC mounted on a FR-4 substrate provides a maximum gain of 67-78dB and NF of 5-10dB across all bands while consuming 114mA from a 2.5V supply. Two BIT techniques for analog and RF circuits are developed. The goal is to reduce the test cost by reducing the use of analog instrumentation. An integrated frequency response characterization system with a digital interface is proposed to test the magnitude and phase responses at different nodes of an analog circuit. A complete prototype in CMOS 0.35mm technology employs only 0.3mm2 of area. Its operation is demonstrated by performing frequency response measurements in a range of 1 to 130MHz on 2 analog filters integrated on the same chip. A very compact CMOS RF RMS Detector and a methodology for its use in the built-in measurement of the gain and 1dB compression point of RF circuits are proposed to address the problem of on-chip testing at RF frequencies. The proposed device generates a DC voltage proportional to the RMS voltage amplitude of an RF signal. A design in CMOS 0.35mm technology presents and input capacitance <15fF and occupies and area of 0.03mm2. The application of these two techniques in combination with a loop-back test architecture significantly enhances the testability of a wireless transceiver system

Direction of Arrival Estimation for Radio Positioning: a Hardware Implementation Perspective

Nowadays multiple antenna wireless systems have gained considerable attention due to their capability to increase performance. Advances in theory have introduced several new schemes that rely on multiple antennas and aim to increase data rate, diversity gain, or to provide multiuser capabilities, beamforming and direction finding (DF) features. In this respect, it has been shown that a multiple antenna receiver can be potentially used to perform radio localization by using the direction of arrival (DoA) estimation technique. In this field, the literature is extensive and gathers the results of almost four decades of research activities. Among the most cited techniques that have been developed, we find the so called high-resolution algorithms, such as multiple signal classification (MUSIC), or estimation of signal parameters via rotational invariance (ESPRIT). Theoretical analysis as well as simulation results have demonstrated their excellent performance to the point that they are usually considered as reference for the comparison with other algorithms. However, such a performance is not necessarily obtained in a real system due to the presence of non idealities. These can be divided into two categories: the impairments due to the antenna array, and the impairments due to the multiple radio frequency (RF) and acquisition front-ends (FEs). The former are strongly influenced by the manufacturing accuracy and, depending on the required DoA resolution, have to be taken into account. Several works address these issues in the literature. The multiple FE non idealities, instead, are usually not considered in the DoA estimation literature, even if they can have a detrimental effect on the performance. This has motivated the research work in this thesis that addresses the problem of DoA estimation from a practical implementation perspective, emphasizing the impact of the hardware impairments on the final performance. This work is substantiated by measurements done on a state-of-the-art hardware platform that have pointed out the presence of non idealities such as DC offsets, phase noise (PN), carrier frequency offsets (CFOs), and phase offsets (POs) among receivers. Particularly, the hardware platform will be herein described and examined to understand what non idealities can affect the DoA estimation performance. This analysis will bring to identify which features a DF system should have to reach certain performance. Another important issue is the number of antenna elements. In fact, it is usually limited by practical considerations, such as size, costs, and also complexity. However, the most cited DoA estimation algorithms need a high number of antenna elements, and this does not yield them suitable to be implemented in a real system. Motivated by this consideration, the final part of this work will describe a novel DoA estimation algorithm that can be used when multipath propagation occurs. This algorithm does not need a high number of antenna elements to be implemented, and it shows good performance despite its low implementation/computational complexity