Hardware simulation of KU-band spacecraft receiver and bit synchronizer, phase 2, volume 1

The acquisition behavior of the PN subsystem of an automatically acquiring spacecraft receiver was studied. A symbol synchronizer subsystem was constructed and integrated into the composite simulation of the receiver. The overall performance of the receiver when subjected to anomalies such as signal fades was evaluated. Potential problems associated with PN/carrier sweep interactions were investigated

Coded spread spectrum digital transmission system design study

Results are presented of a comprehensive study of the performance of Viterbi-decoded convolutional codes in the presence of nonideal carrier tracking and bit synchronization. A constraint length 7, rate 1/3 convolutional code and parameters suitable for the space shuttle coded communications links are used. Mathematical models are developed and theoretical and simulation results are obtained to determine the tracking and acquisition performance of the system. Pseudorandom sequence spread spectrum techniques are also considered to minimize potential degradation caused by multipath

Carrier phase synchronizers

This work studies four carrier phase synchronizers (CPS) or carrier Phase Lock Loop (CPLL). The synchronizers are based in a loop with VCO (Voltage Controlled Oscillator) that synchronizes the output feedback with the input. We consider four carrier synchronizers namely the analog, hybrid, combinational and sequential. The difference between them is in the phase comparator. The main objective is to study the synchronizers output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal to Noise Ratio).University of Beira Interiorinfo:eu-repo/semantics/publishedVersio

Data phase synchronizers of closed loop

This work studies the data phase synchronizers of closed loop or data phase lock loop (DPLL). This synchronizer have all its blocks inside of the loop, for this reason it is called closed loop. The synchronizer is a loop with a phase comparator and VCO (Voltage Controlled Oscillator), that synchronizes the output feedback with the main input data. We consider four data synchronizers namely the analog, the hybrid, the combinational and the sequential. The objective is to study the four synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root MeanSquare) versus input SNR (Signal to Noise Ratio).University of Beira Interiorinfo:eu-repo/semantics/publishedVersio

Synchronous and asynchronous sequential symbol synchronizers

In this work, we present two synchronizer groups: the synchronous and the asynchronous. The synchronous group is based in forward logic with flip flops and the asynchronous group is based in forward logic with delay line feedback. In each group we consider two versions: the manual and the automatic. The main objective is to study the two groups, each one with two versions and to observe its jitter performance as function of the noise

TDRSS S-shuttle unique receiver equipment

Beginning with STS-9, the Tracking and Date Relay Satellite system (TDRSS) will start providing S- and Ku-band communications and tracking support to the Space Shuttle and its payloads. The most significant element of this support takes place at the TDRSS White Sands Ground Terminal, which processes the Shuttle return link S- and Ku-band signals. While Ku-band hardware available to other TDRSS users is also applied to Ku-Shuttle, stringent S-Shuttle link margins have precluded the application of the standard TDRSS S-band processing equipment to S-Shuttle. It was therfore found necessary to develop a unique S-Shuttle Receiver that embodies state-of-the-art digital technology and processing techniques. This receiver, developed by Motorola, Inc., enhances link margins by 1.5 dB relative to the standard S-band equipment and its bit error rate performance is within a few tenths of a dB of theory. An overview description of the Space Shuttle Receiver Equipment (SSRE) is presented which includes the presentation of block diagrams and salient design features. Selected, measured performance results are also presented

Acquisition times of carrier tracking sampled data phase-locked loops

Phase acquisition times of type II and III loops typical of the Advanced Receiver are studied by computer simulations when the loops are disturbed by gaussian noise. Reliable estimates are obtained by running 5000 trials for each combination of loop signal-to-noise ratio (SNR) and frequency offset. The probabilities of acquisition are shown versus time from start of acquisition for various loop SNRs and frequency offsets. For frequency offsets smaller than one-fourth of the loop bandwidth and for loop SNRs of 10 dB and higher, the loops acquire with probability 0.99 within 2.5 B sub L for type II loops and within 7/B sub L for type III loops

Prefilter Bandwidth Effects in Data Phase Synchronizers of Closed Loop

This work studies the prefilter bandwidth effects on the data phase synchronizers of closed loop. The prefilter changes its bandwidth, first B1=(infinite), after B2=2.tx and next B3=1.tx, tx is the bit rate. We consider also four data phase synchronizers or data phase lock loop namely the analog (DPLL_ana), hybrid (DPLL_hib), combinational (DPLL_cmb) and sequential (DPLL_seq). The objective is to study the prefilter bandwidth with the four data synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal to Noise Ratio).University of Beira Interiorinfo:eu-repo/semantics/publishedVersio

Effects of the previous pulse shift and filter on the symbol synchronizer PLL

We will study the effects of the shift of the previous pulse temporal position (between P1 and P2) on the symbol synchronizers jitter behavior. Each pulse temporal position (P1 and P2), with the same previous filter, forms a group with four different carrier PLL (Phase Lock Loop) namely the analog, hybrid, combinational and sequential. The main objective is to study the synchronizers output jitter UIRMS (Unit Interval Root Mean Squared) as function of the input SNR (Signal to Noise Ratio)

Asynchronous Sequential Symbol Synchronizers based on Pulse Comparison by Hybrid Transitions at Quarter Bit Rate

This work studies the asynchronous sequential symbol synchronizers based on pulse comparison by hybrid (both and positive) transitions at quarter bit rate. Their performance will be compared with the standard reference asynchronous symbol synchronizers based on pulse comparison by both transitions at bit rate. For the reference and proposed variants, we consider two versions which are the manual (m) and the automatic (a). The objective is to study the four synchronizers and evaluate their output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal Noise Ratio).University of Beira Interiorinfo:eu-repo/semantics/publishedVersio