DTMOS-Based 0.4V Ultra Low-Voltage Low-Power VDTA Design and Its Application to EEG Data Processing

In this paper, an ultra low-voltage, ultra low-power voltage differencing transconductance amplifier (VDTA) is proposed. DTMOS (Dynamic Threshold Voltage MOS) transistors are employed in the design to effectively use the ultra low supply voltage. The proposed VDTA is composed of two operational transconductance amplifiers operating in the subthreshold region. Using TSMC 0.18µm process technology parameters with symmetric ±0.2V sup¬ply voltage, the total power consumption of the VDTA block is found as just 5.96 nW when the transconductances have 3.3 kHz, 3 dB bandwidth. The proposed VDTA circuit is then used in a fourth-order double-tuned band-pass filter for processing real EEG data measurements. The filter achieves close to 64 dB dynamic range at 2% THD with a total power consumption of 12.7 nW

Systematic Comparison of HF CMOS Transconductors

Transconductors are commonly used as active elements in high-frequency (HF) filters, amplifiers, mixers, and oscillators. This paper reviews transconductor design by focusing on the V-I kernel that determines the key transconductor properties. Based on bandwidth considerations, simple V-I kernels with few or no internal nodes are preferred. In a systematic way, virtually all simple kernels published in literature are generated. This is done in two steps: 1) basic 3-terminal transconductors are covered and 2) then five different techniques to combine two of them in a composite V-I kernel. In order to compare transconductors in a fair way, a normalized signal-to-noise ratio (NSNR) is defined. The basic V-I kernels and the five classes of composite V-I kernels are then compared, leading to insight in the key mechanisms that affect NSNR. Symbolic equations are derived to estimate NSNR, while simulations with more advanced MOSFET models verify the results. The results show a strong tradeoff between NSNR and transconductance tuning range. Resistively generated MOSFETs render the best NSNR results and are robust for future technology developments

Programmable low-voltage continuous-time filter for audio applications

The implementation of a continuous-time filter (CTF) useful for audio frequency applications is presented in this paper. The filter functions can be programmed and tuned with two independent control variables. The filter here proposed has been designed to work at 1.5 V of power supply and at a maximum of 0.5 /spl mu/A/OTA for the worst case current consumption. Electrical simulations of a Tow-Thomas biquad (TTB) show the possibility of obtaining low-pass and band-pass filter functions over the 10 Hz-40 kHz frequency range by changing a control current over four decades.Comisión Interministerial de Ciencia y Tecnología TIC-97-064

CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current

A wideband linear tunable CDTA and its application in field programmable analogue array

This document is the Accepted Manuscript version of the following article: Hu, Z., Wang, C., Sun, J. et al. ‘A wideband linear tunable CDTA and its application in field programmable analogue array’, Analog Integrated Circuits and Signal Processing, Vol. 88 (3): 465-483, September 2016. Under embargo. Embargo end date: 6 June 2017. The final publication is available at Springer via https://link.springer.com/article/10.1007%2Fs10470-016-0772-7 © Springer Science+Business Media New York 2016In this paper, a NMOS-based wideband low power and linear tunable transconductance current differencing transconductance amplifier (CDTA) is presented. Based on the NMOS CDTA, a novel simple and easily reconfigurable configurable analogue block (CAB) is designed. Moreover, using the novel CAB, a simple and versatile butterfly-shaped FPAA structure is introduced. The FPAA consists of six identical CABs, and it could realize six order current-mode low pass filter, second order current-mode universal filter, current-mode quadrature oscillator, current-mode multi-phase oscillator and current-mode multiplier for analog signal processing. The Cadence IC Design Tools 5.1.41 post-layout simulation and measurement results are included to confirm the theory.Peer reviewedFinal Accepted Versio

Analogue micropower FET techniques review

A detailed introduction to published analogue circuit design techniques using Si and Si/SiGe FET devices for very low-power applications is presented in this review. The topics discussed include sub-threshold operation in FET devices, micro-current mirrors and cascode techniques, voltage level-shifting and class-AB operation, the bulk-drive approach, the floating-gate method, micropower transconductance-capacitance and log-domain filters and strained-channel FET technologies

FGMOS Based Voltage-Controlled Grounded Resistor

This paper proposes a new floating gate MOSFET (FGMOS) based voltage-controlled grounded resistor. In the proposed circuit FGMOS operating in the ohmic region is linearized by another conventional MOSFET operating in the saturation region. The major advantages of FGMOS based voltage-controlled grounded resistor (FGVCGR) are simplicity, low total harmonic distortion (THD), and low power consumption. A simple application of this FGVCGR as a tunable high-pass filter is also suggested. The proposed circuits operate at the supply voltages of +/-0.75 V. The circuits are designed and simulated using SPICE in 0.25-µm CMOS technology. The simulation results of FGVCGR demonstrate a THD of 0.28% for the input signal 0.32 Vpp at 45 kHz, and a maximum power consumption of 254 µW