11,263 research outputs found

    Learning architectures and negotiation of meaning in European trade unions

    Get PDF
    As networked learning becomes familiar at all levels and in all sectors of education, cross-fertilisation of innovative methods can usefully inform the lifelong learning agenda. Development of the pedagogical architectures and social processes, which afford learning, is a major challenge for educators as they strive to address the varied needs of a wide range of learners. One area in which this challenge is taken very seriously is that of trade unions, where recent large-scale projects have aimed to address many of these issues at a European level. This paper describes one such project, which targeted not only online courses, but also the wider political potential of virtual communities of practice. By analysing findings in relation to Wengers learning architecture, the paper investigates further the relationships between communities of practice and communities of learners in the trade union context. The findings suggest that a focus on these relationships rather than on the technologies that support them should inform future developments

    Examining the five‐stage e‐moderating model: Designed and emergent practice in the learning technology profession

    Get PDF
    This paper highlights the need for learning technologists to establish their ‘academic legitimacy’ within the complexities of online learning and teaching practice. Frameworks such as the ‘five stage e‐moderating model’ can be useful in developing the knowledge base but there are dangers in them becoming too reified within an increasingly commodified higher education (HE) environment. The paper calls for greater professional reflexivity and contestation within learning technology practice and concludes by inviting the Alt‐J readership to engage in a critical debate with regard to these issues

    Towards Adaptable and Adaptive Policy-Free Middleware

    Get PDF
    We believe that to fully support adaptive distributed applications, middleware must itself be adaptable, adaptive and policy-free. In this paper we present a new language-independent adaptable and adaptive policy framework suitable for integration in a wide variety of middleware systems. This framework facilitates the construction of adaptive distributed applications. The framework addresses adaptability through its ability to represent a wide range of specific middleware policies. Adaptiveness is supported by a rich contextual model, through which an application programmer may control precisely how policies should be selected for any particular interaction with the middleware. A contextual pattern mechanism facilitates the succinct expression of both coarse- and fine-grain policy contexts. Policies may be specified and altered dynamically, and may themselves take account of dynamic conditions. The framework contains no hard-wired policies; instead, all policies can be configured.Comment: Submitted to Dependable and Adaptive Distributed Systems Track, ACM SAC 200

    Accessible user interface support for multi-device ubiquitous applications: architectural modifiability considerations

    Get PDF
    The market for personal computing devices is rapidly expanding from PC, to mobile, home entertainment systems, and even the automotive industry. When developing software targeting such ubiquitous devices, the balance between development costs and market coverage has turned out to be a challenging issue. With the rise of Web technology and the Internet of things, ubiquitous applications have become a reality. Nonetheless, the diversity of presentation and interaction modalities still drastically limit the number of targetable devices and the accessibility toward end users. This paper presents webinos, a multi-device application middleware platform founded on the Future Internet infrastructure. Hereto, the platform's architectural modifiability considerations are described and evaluated as a generic enabler for supporting applications, which are executed in ubiquitous computing environments

    Survey over Existing Query and Transformation Languages

    Get PDF
    A widely acknowledged obstacle for realizing the vision of the Semantic Web is the inability of many current Semantic Web approaches to cope with data available in such diverging representation formalisms as XML, RDF, or Topic Maps. A common query language is the first step to allow transparent access to data in any of these formats. To further the understanding of the requirements and approaches proposed for query languages in the conventional as well as the Semantic Web, this report surveys a large number of query languages for accessing XML, RDF, or Topic Maps. This is the first systematic survey to consider query languages from all these areas. From the detailed survey of these query languages, a common classification scheme is derived that is useful for understanding and differentiating languages within and among all three areas

    Reification: A Process to Configure Java Realtime Processors

    Get PDF
    Real-time systems require stringent requirements both on the processor and the software application. The primary concern is speed and the predictability of execution times. In all real-time applications the developer must identify and calculate the worst case execution times (WCET) of their software. In almost all cases the processor design complexity impacts the analysis when calculating the WCET. Design features which impact this analysis include cache and instruction pipelining. With both cache and pipelining the time taken for a particular instruction can vary depending on cache and pipeline contents. When calculating the WCET the developer must ignore the speed advantages from these enhancements and use the normal instruction timings. This investigation is about a Java processor targeted to run within an FPGA environment (Java soft chip) supporting Java real-time applications. The investigation focuses on a simple processor design that allows simple analysis of WCET. The processor design has no cache and no instruction pipeline enhancements yet achieves higher performance than existing designs with these enhancements. The investigation centers on a process that translates Java byte codes and folds these translated codes into a modified Harvard Micro Controller (HMC). The modifications include better alignment with the application code and take advantage of the FPGA’s parallel capability. A prototyped ontology is used where the top level categories defined by Sowa are expanded to support the process. The proposed HMC and process are used to produce investigation results. Performance testing using the Sobel edge detection algorithm is used to compare the results with the only Java processor claiming real-time abilities
    • 

    corecore