Design and fabrication of superjunction power MOSFET devices

Ph.DDOCTOR OF PHILOSOPH

Journal of Telecommunications and Information Technology, 2004, nr 1

kwartalni

Assessment of partial discharge activity and conductivity in IGBT modules as a reliability index

Al giorno d’oggi l’elettronica di potenza deve essere in grado di operare in ambienti ostili e in condizioni di lavoro difficili. Il tema dell’affidabilità è diventato fondamentale quanto quello dell’efficienza. Questa tesi si focalizza sull’IGBT, in particolare sul suo sistema d’isolamento. Il primo passo è stato studiare in dettaglio i meccanismi di guasto possibili e più frequenti. Dal momento che le scariche parziali risultano essere un problema per l’affidabilità dei dielettrici solidi, in questo studio si esamina l’attività di PD su moduli IGBT nuovi ed invecchiati, in diverse configurazioni, con forme d’onda di tensione e temperature differenti. Si sono effettuate anche misure di corrente di dispersione su moduli nuovi ed invecchiati alla temperatura di lavoro. I risultati sono stati post-processati statisticamente tentando di ottenere indici di affidabilità per quei moduli. Quasi tutti i moduli invecchiati sono interessati da PD e i risultati mostrano che il PDIV, assieme ad altri fattori, è sicuramente influenzato dall’ageing. I risultati del monitoraggio della corrente di dispersione mostrano una tendenza all'aumento con l'invecchiamento. Si sono svolte anche simulazioni con software agli elementi finiti e rilevazioni ottiche di PD ed entrambe supportano i risultati ottenuti. È necessario effettuare ulteriori indagini su un data set più ampio al fine di migliorare un algoritmo di diagnostica predittiva basato sui valori di PDIV e conducibilità

Thermal Performance of AlGaN/GaN Based Power Switching Devices for Transformerless Inverters

Wide Bandgap (WBG) semiconductors like Silicon Carbide (SiC), Gallium Nitride (GaN) and Aluminum Gallium Nitride (AlGaN) have superior material properties as compared to Silicon (Si) like higher electrical breakdown voltages and bandgap energies as well as lower leakage currents as compared to Si which make them ideal to operate at higher voltage with lower thermal losses. These properties make WBG materials ideal for power devices like Vertical Double-diffused Metal Oxide Semiconductor Field Effect Transistors (VDMOSFETs). The use of digital prototyping through computer simulation increases the speed and flexibility of the design iterations while reducing the cost and time required for the design process. COMSOL Multiphysics is a Finite Element Method simulation software that has capabilities of combining different physics interfaces to simulate the effects of multiple interdependent physical phenomena. The use of these materials in switching devices like VDMOSFETs have been modelled in COMSOL Multiphysics in 2D and 3D for the purposes of this research dissertation. The electrical and thermal advantages of WBG materials, specifically SiC, GaN and AlGaN, as compared to Si as semiconductor materials for VDMOSFET structures for the exact same VDMOSFET structures are demonstrated and quantified from the results obtained. The inverter is the most important component in a Photo Voltaic (PV) system that needs to be improved. Transformerless inverters have higher efficiencies at lower weight and size specifications as compared to ones with transformers. A modified topology of a single phase transformerless inverter with new current paths and improved efficiencies is proposed and its performance is analyzed in PSIM software with Si and WBG material power switching devices. The advantages of the WBG devices over Si in terms of power losses are also exhibited in this research. The power losses obtained from the models in PSIM are then used as inputs to COMSOL models for temperature comparisons of the switching device modules. The improved temperature performance of the WBG devices are then demonstrated by the reduction in heatsink requirements as compared to identical Si switching modules

Miniaturized Transistors, Volume II

In this book, we aim to address the ever-advancing progress in microelectronic device scaling. Complementary Metal-Oxide-Semiconductor (CMOS) devices continue to endure miniaturization, irrespective of the seeming physical limitations, helped by advancing fabrication techniques. We observe that miniaturization does not always refer to the latest technology node for digital transistors. Rather, by applying novel materials and device geometries, a significant reduction in the size of microelectronic devices for a broad set of applications can be achieved. The achievements made in the scaling of devices for applications beyond digital logic (e.g., high power, optoelectronics, and sensors) are taking the forefront in microelectronic miniaturization. Furthermore, all these achievements are assisted by improvements in the simulation and modeling of the involved materials and device structures. In particular, process and device technology computer-aided design (TCAD) has become indispensable in the design cycle of novel devices and technologies. It is our sincere hope that the results provided in this Special Issue prove useful to scientists and engineers who find themselves at the forefront of this rapidly evolving and broadening field. Now, more than ever, it is essential to look for solutions to find the next disrupting technologies which will allow for transistor miniaturization well beyond silicon’s physical limits and the current state-of-the-art. This requires a broad attack, including studies of novel and innovative designs as well as emerging materials which are becoming more application-specific than ever before

Caractérisation et modélisation électro-thermique distribuée d'une puce IGBT : Application aux effets du vieillissement de la métallisation d'émetteur

Power modules, organized around power chips (IGBT, MOSFET, diodes, …), are increasingly needed for transportations systems such a rail, aeronautics and automobile. In all these application, power devices reliability is still a critical point. This is particularly the case in the powertrain of hybrid or electric vehicle in which power chips are often subjected to very high electrical and thermal stress levels such as hybrid or electric vehicle, power devices are subjected to very high electrical, thermal and mechanical stress levels which may affect their reliability.Thus, the ability to analyze the coupled phenomena and to accurately predict degradation mechanisms in power semiconductors and their effects due to electro-thermal and thermo-mechanical stress is essential. Especially on the semiconductor chip where significant physical interactions occur and its immediate vicinity. The aim of this work is to highlight the electro-mechanical and thermal stress and their effects on the semiconductor chip and its immediate vicinity, by evaluating the effects of damage using distributed models. This work consists of two parts :An original experimental approach concerning the elctro-thermal characterization of cross section power chips (IGBT and diodes). In this approach, it is exposed for the first time, an original way to characterize vertical thermal distributions inside high power silicon devices under forward bias. Thus, the vertical mapping of temperature and mechanical stress of IGBT and diode chip are presented. The impact of this work that is opens a wide field of investigations in high power semiconductor devices. The second part is theoretical and aims to implementing a distributed electro-thermal model of IGBT chip.The modeling strategy consists on a discretization of the power semiconductor chip in macro-cells with a distributed electro-thermal behavior over the chip area. In case of the IGBT devices each macro-cell is governed by the Hefner model and electrically linked by their terminals. Temperature variable used in these macro-cells are obtained by a nodal 3D-RC thermal model. This allows the distributed electro-thermal problem to be solved homogeneously and simultaneously by a circuit solver such as Simplorer. The aim of this model is to allow the accurate analysis of some effects ine the electrical and thermal coupling over the chip. Especially, this model should allow explaining some effects such as the contacts position over the die metallization and the ageing of the emitter metallization of the chip. In a first step, the model is used to clarify how the current and the temperature map are distributed over the chip according to the relative positions between cells and wire bond contacts on the top-metal during short-circuit operation. In a second step, we will show how dynamic latch-up failures may occur when trying to turn-off a short circuit process.Les convertisseurs de puissance structurés autour de puces de puissance (IGBT, MOSFET, diodes, ...) sont de plus en plus sollicités dans les systèmes de transport, du ferroviaire à l'aéronautique, en passant par l'automobile. Dans toutes ces applications, la fiabilité des composants constitue encore un point critique. C'est notamment le cas dans la chaîne de traction de véhicules électriques (VE) et hybrides (VH, où les puces sont souvent exposées à de fortes contraintes électriques, thermiques et mécaniques pouvant conduire à la défaillance. Dans ce contexte, l'amélioration des connaissances sur les effets des dégradations des composants semi-conducteurs de puissance et leurs assemblages dus au stress électrothermiques et thermomécaniques est incontournable. En particulier sur la puce semi-conductrice elle-même, siège d'interactions physiques importantes, et en son voisinage immédiat. Les objectifs de la thèse sont de mettre en lumière les stress électro-thermiques et mécaniques dans les puces et leurs effets sur la puce et son voisinage immédiat et à évaluer les effets de dégradations à l'aide de modèles distribués. Les travaux comportent ainsi deux volets. Un volet expérimental original visant la caractérisation électrothermique de puce de puissance (IGBT et diode) sur la base de micro-sections. La piste suivie par cette approche devrait permettre de rendre possible la caractérisation d'un certain nombre de grandeurs physiques (thermiques, électriques et mécaniques) sur les tranches sectionnées des puces sous polarisation (en statique, voire en dynamique) et ainsi contribuer à l'amélioration des connaissances de leur comportement. Ainsi, des cartographies de distributions verticales de température de puce IGBT et diode et de contraintes mécaniques sont présentées. C'est à notre connaissance une voie originale qui devrait permettre de d’ouvrir un large champ d'investigation dans le domaine de la puissance.Le second volet est théorique et consiste à mettre en place un modèle électrothermique distribué de puce IGBT. Cette modélisation comme nous l'envisageons implique de coupler dans un unique environnement (Simplorer) une composante thermique et une composant électrique. Le développement choisi passe par l'utilisation de modèle physique d'IGBT tels que celui de Hefner. Ce modèle est ensuite appliqué pour étudier le rôle et les effets du vieillissement de la métallisation de puce lors de régimes électriques extrêmes répétitifs tels que les courts-circuits. Un aspect original du travail est la démonstration par analyse numérique du mode de défaillance par latch-up dynamique à l'instant de la commande d'ouverture du courant de court-circuit. Ce phénomène bien qu'ayant été observé lors de vieillissement d'IGBT par répétition de courts-circuits n'avait à notre connaissance pas encore été simulé. La modélisation distribuée de la puce et la simulation du phénomène nous a ainsi permis de vérifier certaines hypothèses

Design of miniaturized radio-frequency DC-DC power converters

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 321-325).Power electronics appear in nearly every piece of modern electronic hardware, forming an essential conduit from electrical source to load. Portable electronics, an area where a premium is placed on size, weight, and cost, are driving the development of power systems with greater density and better manufacturability. This motivates a push to higher switching frequencies enabling smaller passive components and better integration. To realize these goals this thesis explores devices, circuits, and passives capable of operating efficiently into the VHF regime (30-300 MHz) and their integration into power electronic systems of high power density. A good integrated power MOSFET presages high-density converters. Previous VHF systems were demonstrated with bulky and expensive RF Lateral, Double-Diffused MOSFETs (LDMOSFET). We show that through a combination of layout optimization and safe operating area (SOA) extension integrated devices can achieve near-parity performance to their purpose-built RF discrete cousins over the desired operating regime. A layout optimization method demonstrating a 2x reduction in device loss is presented alongside experimental demonstration of SOA extension. Together the methods yield a 3x reduction in loss that bolsters the utility of the typical (and relatively inexpensive) LDMOS IC power process for VHF converters. Passive component synthesis is addressed in the context of an isolated VHF converter topology. We present a VHF topology where most of the magnetic energy storage is accomplished in a transformer that forms an essential part of the resonant network. The reduced component count aids in manufacturability and size, but places difficult requirements on the transformer design. An algorithm for synthesizing small and efficient air-core transformers with a fully-constrained inductance matrix is presented. Planar PCB transformers are fabricated and match the the design specifications to within 15%. They are 94% efficient and have a power density greater than 2kW per cubic inch. To take full advantage of good devices and printed passives, we develop an IC for the isolated converter having optimized power devices, and integrated gate driver, controller, and hotel functions. The chip is assembled into a complete converter system using the transformers and circuits described above. Flip-chip mounting is used to overcome bondwire parasitics, and reduce packaging volume. The final system achieves 75% efficiency at 75 MHz at 6W.by Anthony D. Sagneri.Ph.D

Feature Papers in Electronic Materials Section

This book entitled "Feature Papers in Electronic Materials Section" is a collection of selected papers recently published on the journal Materials, focusing on the latest advances in electronic materials and devices in different fields (e.g., power- and high-frequency electronics, optoelectronic devices, detectors, etc.). In the first part of the book, many articles are dedicated to wide band gap semiconductors (e.g., SiC, GaN, Ga2O3, diamond), focusing on the current relevant materials and devices technology issues. The second part of the book is a miscellaneous of other electronics materials for various applications, including two-dimensional materials for optoelectronic and high-frequency devices. Finally, some recent advances in materials and flexible sensors for bioelectronics and medical applications are presented at the end of the book