1,014 research outputs found

    Via transition modeling and charge replenishment of the power delivery network in multilayer PCBs

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    In the first article of this thesis, the charge delivery in the power distribution network for printed circuit board has been analyzed in the time-domain. Performing all the simulations and analyzing the PDN physics and modeling, I contributed to a better understanding of the time-domain decoupling mechanism. The second paper studies the noise coupling sing a segmentation approach combined with a via-to-antipad capacitance model and a plane-pair cavity model. Building equivalent circuit models as well as analyzing design strategies, I contributed to a new approach for the PDN analysis in multilayer PCBs. The third article discusses how to estimate the amount of current needed for large ICs and how to evaluate the amount of noise voltage due to this current draw. After accurate discussion of the design strategies, I modeled and simulated the free evolution of a charged PCB with and without decoupling capacitors. The depletion of charges stored between the power buses in time and frequency-domain has been investigated as a function of the plane thickness, SMT decoupling closeness in the fourth paper. With my contribution, the time and frequency-domain in the PDN have been related using circuit approach. In the fifth paper, I analyzed a 26-layer printed circuit board performing milling, measurements and building circuit models. It is the first time that the segmentation approach has been used for differential geometry. In addition, Debye materials have been implemented in the cavity model --Abstract, page iv

    Development of the readout electronics for the high luminosity upgrade of the CMS outer strip tracker

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    The High-luminosity upgrade of the LHC will deliver the dramatic increase in luminosity required for precision measurements and to probe Beyond the Standard Model theories. At the same time, it will present unprecedented challenges in terms of pileup and radiation degradation. The CMS experiment is set for an extensive upgrade campaign, which includes the replacement of the current Tracker with another all-silicon detector with improved performance and reduced mass. One of the most ambitious aspects of the future Tracker will be the ability to identify high transverse momentum track candidates at every bunch crossing and with very low latency, in order to include tracking information at the L1 hardware trigger stage, a critical and effective step to achieve triggers with high purity and low threshold. This thesis presents the development and the testing of the CMS Binary Chip 2 (CBC2), a prototype Application Specific Integrated Circuit (ASIC) for the binary front-end readout of silicon strip detectors modules in the Outer Tracker, which also integrates the logic necessary to identify high transverse momentum candidates by correlating hits from two silicon strip detectors, separated by a few millimetres. The design exploits the relation between the transverse momentum and the curvature in the trajectory of charged particles subject to the large magnetic field of CMS. The logic which follows the analogue amplification and binary conversion rejects clusters wider than a programmable maximum number of adjacent strips, compensates for the geometrical offset in the alignment of the module, and correlates the hits between the two sensor layers. Data are stored in a memory buffer before being transferred to an additional buffer stage and being serially read-out upon receipt of a Level 1 trigger. The CBC2 has been subject to extensive testing since its production in January 2013: this work reports the results of electrical characterization, of the total ionizing dose irradiation tests, and the performance of a prototype module instrumented with CBC2 in realistic conditions in a beam test. The latter is the first experimental demonstration of the Pt-selection principle central to the future of CMS. Several total-ionizing-dose tests highlighted no functional issue, but observed significant excess static current for doses <1 Mrad. The source of the excess was traced to static leakage current in the memory pipeline, and is believed to be a consequence of the high instantaneous dose delivered by the x-ray setup. Nevertheless, a new SRAM layout aimed at removing the leakage path was proposed for the CBC3. The results of single event upset testing of the chip are also reported, two of the three distinct memory circuits used in the chip were proven to meet the expected robustness, while the third will be replaced in the next iteration of the chip. Finally, the next version of the ASIC is presented, highlighting the additional features of the final prototype, such as half-strip resolution, additional trigger logic functionality, longer trigger latency and higher rate, and fully synchronous stub readout.Open Acces

    Ultra-low power radio transceiver for wireless sensor networks

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    The objective of this thesis is to present the design and implementation of ultra-low power radio transceivers at microwave frequencies, which are applicable to wireless sensor network (WSN) and, in particular, to the requirement of the Speckled Computing Consortium (or SpeckNet). This was achieved through quasi-MMIC prototypes and monolithic microwave integrated circuit (MMIC) with dc power consumption of less than 1mW and radio communication ranges operating at least one metre. A wireless sensor network is made up of widely distributed autonomous devices incorporating sensors to cooperatively monitor physical environments. There are different kinds of sensor network applications in which sensors perform a wide range of activities. Among these, a certain set of applications require that sensor nodes collect information about the physical environment. Each sensor node operates autonomously without a central node of control. However, there are many implementation challenges associated with sensor nodes. These nodes must consume extremely low power and must communicate with their neighbours at bit-rates in the order of hundreds of kilobits per second and potentially need to operate at high volumetric densities. Since the power constraint is the most challenging requirement, the radio transceiver must consume ultra-low power in order to prolong the limited battery capacity of a node. The radio transceiver must also be compact, less than 5×5 mm2, to achieve a target size for sensor node and operate over a range of at least one metre to allow communication between widely deployed nodes. Different transceiver topologies are discussed to choose the radio transceiver architecture with specifications that are required in this project. The conventional heterodyne and homodyne topologies are discussed to be unsuitable methods to achieve low power transceiver due to power hungry circuits and their high complexity. The super-regenerative transceiver is also discussed to be unsuitable method because it has a drawback of inherent frequency instability and its characteristics strongly depend on the performance of the super-regenerative oscillator. Instead, a more efficient method of modulation and demodulation such as on-off keying (OOK) is presented. Furthermore, design considerations are shown which can be used to achieve relatively large output voltages for small input powers using an OOK modulation system. This is important because transceiver does not require the use of additional circuits to increase gain or sensitivity and consequently it achieves lower power consumption in a sensor node. This thesis details the circuit design with both a commercial and in-house device technology with ultra-low dc power consumption while retaining adequate RF performance. It details the design of radio building blocks including amplifiers, oscillators, switches and detectors. Furthermore, the circuit integration is presented to achieve a compact transceiver and different circuit topologies to minimize dc power consumption are described. To achieve the sensitivity requirements of receiver, a detector design method with large output voltage is presented. The receiver is measured to have output voltages of 1mVp-p for input powers of -60dBm over a 1 metre operating range while consuming as much as 420μW. The first prototype combines all required blocks using an in-house GaAs MMIC process with commercial pseudomorphic high electron mobility transistor (PHEMT). The OOK radio transceiver successfully operates at the centre frequency of 10GHz for compact antenna and with ultra-low power consumption and shows an output power of -10.4dBm for the transmitter, an output voltage of 1mVp-p at an operating range of 1 metre for the receiver and a total power consumption of 840μW. Based on this prototype, an MMIC radio transceiver at the 24GHz band is also designed to further improve the performance and reduce the physical size with an advanced 50nm gate-length GaAs metamorphic high electron mobility transistor (MHEMT) device technology

    Generadores de pulso del orden de nanosegundos para control de calidad y diagnosis de las cámaras de telescopios Cherenkov

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    Tesis inédita de la Universidad Complutense de Madrid, Facultad de Ciencias Físicas, Departamento de Física Aplicada III (Electricidad y Electrónica), leída el 30-11-2015Depto. de Estructura de la Materia, Física Térmica y ElectrónicaFac. de Ciencias FísicasTRUEunpu

    Radio Electronics

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    Novel techniques for improving the performance of MESFET power amplifiers.

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    This thesis describes the research activities that have been investigated for improving the 3rd order intermodulation distortion products (IM3) and power added efficiency (PAE) and bandwidth performance of microwave GaAs MESFET power amplifiers. Two novel circuit techniques, one for improving the 3dB bandwidth performance and the other for improving the IM3 and PAE performance, were proposed and verified through simulation and practical measurements. The technique of including lumped elements matching networks within the package encapsulation (Close-to-Chip lumped element matching) of a 2GHz MESFET device is described for the first time. Simulation results showed that the amplifier using this technique had a 3dB bandwidth 3 times wider than the amplifier with Off-Chip distributed element matching. The linearity and efficiency performance of a 2GHz MESFET was improved significantly by presenting a difference frequency shunt short-circuit termination across the drain terminal. A 16dB reduction in IM3 and an improvement of 4% in PAE performance was measured on the bench. Success with this technique was further demonstrated with digitally modulated signals

    Addressable time division multiplexer system /cable and connector study/ Final report

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    Reliability studies of single interrogation and single data cables used in prototype addressable time division multiplexer syste

    The Design, Building, and Testing of a Constant on Discreet Jammer for the Ieee 802.15.4/ZIGBEE Wireless Communication Protocol

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    As wireless protocols become easier to implement, more products come with wireless connectivity. This latest push for wireless connectivity has left a gap in the development of the security and the reliability of some protocols. These wireless protocols can be used in the growing field of IoT where wireless sensors are used to share information throughout a network. IoT is being implemented in homes, agriculture, manufactory, and in the medical field. Disrupting a wireless device from proper communication could potentially result in production loss, security issues, and bodily harm. The 802.15.4/ZigBee protocol is used in low power, low data rate, and low cost wireless applications such as medical devices and home automation devices. This protocol uses CSMA-CA (Carrier Sense Multiple Access w/ Collision Avoidance) which allows for multiple ZigBee devices to transmit simultaneousness and allows for wireless coexistence with the existing protocols at the same frequency band. The CSMA-CA MAC layer seems to introduce an unintentional gap in the reliability of the protocol. By creating a 16-tone signal with center frequencies located in the center of the multiple access channels, all channels will appear to be in use and the ZigBee device will be unable to transmit data. The jamming device will be created using the following hardware implementation. An FPGA connected to a high-speed Digital to Analog Converter will be used to create a digital signal synthesizer device that will create the 16-tone signal. The 16-tone signal will then be mixed up to the 2.4 GHz band, amplified, and radiated using a 2.4 GHz up-converter device. The transmitted jamming signal will cause the ZigBee MAC layer to wait indefinitely for the channel to clear. Since the channel will not clear, the MAC layer will not allow any transmission and the ZigBee devices will not communicate

    Development of a solid state amplifier for the 3rd harmonic cavity for ALBA synchrotron light source

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    In Synchrotron Light Source facilities with high energy and low emittance electron beams different techniques for improving the quality of the synchrotron light for the users are applied. With this aim ALBA, the Spanish 3rd generation Synchrotron Light Source, is developing a 3rd Harmonic radiofrequency (RF) system as a system additional to the main RF system of the storage ring. This system will consist of four normal conducting active cavities at 1.5 GHz that will provide the required 1.1 MV accelerating voltage to the electron beam and will be fed by four 20 kW power transmitters. This power will be generated by modular Solid State Power Amplifiers (SSPAs) in a continuous wave mode at 1.5 GHz. On the basis of preliminary studies it has been decided that the architecture of each 20 kW power transmitter is a tree diagram made up of primary 1 kW SSPA modules connected in parallel in a combination array. The present PhD thesis is devoted to the design, building and evaluation of a prototype of the 1 kW SSPA module formed four 250 W primary power amplifier modules. Accordingly, all subsystems, namely input and output matching networks of the 250 W primary module, and a four-way power splitter, a four-way power combiner and a novel directivity compensated directional coupler for the non-invasive power monitoring of the 1 kW power amplifier were also designed and their prototypes were tested. A final evaluation of the combined 1 kW SSPA prototype module was successfully carried out and has shown good performance.En las instalaciones de tipo Fuentes de luz de sincrotrón de haz de electrones de alta energía y baja emitancia se aplican diferentes técnicas de mejora de la calidad de la luz de sincrotrón. Con este objetivo, el ALBA, la fuente española de luz de sincrotrón de la tercera generación, está desarrollando un sistema de radiofrecuencia (RF) de la 3ª Harmónica como un sistema adicional al sistema de RF principal del anillo de almacenamiento. Este sistema consistirá de cuatro cavidades activas de conductividad normal de frecuencia 1,5 GHz que suministrarán un voltaje acelerador de 1.1 MV necesario para el haz de electrones y que serán alimentadas por cuatro transmisores de potencia de 20 kW. Esta potencia será generada en modo de onda continua a frecuencia 1.5 GHz por amplificadores de potencia de estado sólido (APES) de estructura modular. A partir de unos estudios preliminares se ha decidido que la arquitectura de cada transmisor de potencia de 20 kW es de tipo diagrama de árbol que consiste de APES primarios de potencia 1 kW conectados en paralelo formando una matriz de combinación. El tema de la presente tesis es el diseño, la construcción y la caracterización de un prototipo del módulo de APES de potencia 1 kW formado por cuatro amplificadores primarios de 250 W de potencia. También, todos subsistemas, concretamente los circuitos de adaptación de entrada y de salida del módulo primario de 250 kW, así como un divisor de cuatro salidas, un combinador de cuatro entradas y un acoplador direccional con una nova solución de compensación de directividad para una monitorización no invasiva han sido diseñados y sus prototipos han sido testeados. La evaluación final de funcionamiento del APES de 1 kW de potencia ha sido realizada con éxito y ha demostrado su buen rendimiento.Postprint (published version
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