2,198 research outputs found
Pattern matching in compilers
In this thesis we develop tools for effective and flexible pattern matching.
We introduce a new pattern matching system called amethyst. Amethyst is not
only a generator of parsers of programming languages, but can also serve as an
alternative to tools for matching regular expressions.
Our framework also produces dynamic parsers. Its intended use is in the
context of IDE (accurate syntax highlighting and error detection on the fly).
Amethyst offers pattern matching of general data structures. This makes it a
useful tool for implementing compiler optimizations such as constant folding,
instruction scheduling, and dataflow analysis in general.
The parsers produced are essentially top-down parsers. Linear time complexity
is obtained by introducing the novel notion of structured grammars and
regularized regular expressions. Amethyst uses techniques known from compiler
optimizations to produce effective parsers.Comment: master thesi
Maximum Coverage and Maximum Connected Covering in Social Networks with Partial Topology Information
Viral marketing campaigns seek to recruit the most influential individuals to
cover the largest target audience. This can be modeled as the well-studied
maximum coverage problem. There is a related problem when the recruited nodes
are connected. It is called the maximum connected cover problem. This problem
ensures a strong coordination between the influential nodes which are the
backbone of the marketing campaign. In this work, we are interested on both of
these problems. Most of the related literature assumes knowledge about the
topology of the network. Even in that case, the problem is known to be NP-hard.
In this work, we propose heuristics to the maximum connected cover problem and
the maximum coverage problem with different knowledge levels about the topology
of the network. We quantify the difference between these heuristics and the
local and global greedy algorithms
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MILO : a microarchitecture and logic optimizer
In this report we discuss strengths and weaknesses of logic synthesis systems and describe a system for microarchitectural and logic optimization. Our system uses a set of algorithms for synthesizing SSI/MSI macros from parameterized microarchitecture components. In addition, it uses rules for optimizing both at the microarchitecture and logic level. The system increases designer productivity and requires less design knowledge and experience from circuit engineers
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