Process Performance Analysis in Large-Scale Systems Integrating Different Sources of Information

Process auditing using historical data can identify causes for poor performance and reveal opportunities to improve process operation. To date, the data used has been limited to process measurements; however other sources hold complementary information about the process behavior. This paper proposes a new approach to root-cause diagnosis, which also takes advantage of the information in utility, mechanical and electrical data, alarms and diagrams. Its benefit is demonstrated in an industrial case study, by tackling an important challenge in root-cause analysis: large-scale systems. This paper also defines specifications for a semi-automated tool to implement the proposed approach. © 2012 IFAC

A knowledge-based system design/information tool

The objective of this effort was to develop a Knowledge Capture System (KCS) for the Integrated Test Facility (ITF) at the Dryden Flight Research Facility (DFRF). The DFRF is a NASA Ames Research Center (ARC) facility. This system was used to capture the design and implementation information for NASA's high angle-of-attack research vehicle (HARV), a modified F/A-18A. In particular, the KCS was used to capture specific characteristics of the design of the HARV fly-by-wire (FBW) flight control system (FCS). The KCS utilizes artificial intelligence (AI) knowledge-based system (KBS) technology. The KCS enables the user to capture the following characteristics of automated systems: the system design; the hardware (H/W) design and implementation; the software (S/W) design and implementation; and the utilities (electrical and hydraulic) design and implementation. A generic version of the KCS was developed which can be used to capture the design information for any automated system. The deliverable items for this project consist of the prototype generic KCS and an application, which captures selected design characteristics of the HARV FCS

Steering in-plane shear waves with inertial resonators in platonic crystals

Numerical simulations shed light on control of shear elastic wave propagation in plates structured with inertial resonators. The structural element is composed of a heavy core connected to the main freestanding plate through tiny ligaments. It is shown that such a configuration exhibits a complete band gap in the low frequency regime. As a byproduct, we further describe the asymmetric twisting vibration of a single scatterer via modal analysis, dispersion and transmission loss. This might pave the way to new functionalities such as focusing and self-collimation in elastic plates

Structured illumination microscopy using micro-pixellated light-emitting diodes

Structured illumination is a flexible and economical method of obtaining optical sectioning in wide-field microscopy [1]. In this technique the illumination system is modified to project a single-spatial frequency grid pattern onto the sample [2, 3]. The pattern can only be resolved in the focal plane and by recording images for different transverse grid positions (or phases) an image of the in-focus parts of the object can be calculated. Light emitting diodes (LEDs) are becoming increasingly popular for lighting and illumination systems due to their low cost, small dimensions, low coherence, uniform illumination, high efficiency and long lifetime. These properties, together with recent developments in high brightness, ultraviolet operation and microstructured emitter design offer great potential for LEDs as light sources for microscopy. In this paper we demonstrate a novel structured illumination microscope using a blue micro-structured light emitting diode as the illumination source. The system is potentially very compact and has no-moving-parts

Synthesis from VHDL : Rockwell-counter case study

This report describes the design process and synthesis tools used in the UC Irvine CADLAB design environment to design a representative benchmark. The steps taken and rationale used in each stage of the design process are discussed. The benchmark is initially described using a VHDL behavioral description; results produced by each intermediate tool are presented, showing the system flow and integration of tools. The final silicon layout is performed in 3 micron CMOS technology