Clustering-Based Simultaneous Task and Voltage Scheduling for NoC Systems

Network-on-Chip (NoC) is emerging as a promising communication structure, which is scalable with respect to chip complexity. Meanwhile, latest chip designs are increasingly leveraging multiple voltage-frequency domains for energy-efficiency improvement. In this work, we propose a simultaneous task and voltage scheduling algorithm for energy minimization in NoC based designs. The energy-latency tradeoff is handled by Lagrangian relaxation. The core algorithm is a clustering based approach which not only assigns voltage levels and starting time to each task (or Processing Element) but also naturally finds voltage-frequency clusters. Compared to a recent previous work, which performs task scheduling and voltage assignment sequentially, our method leads to an average of 20 percent energy reduction

Clustering-Based Simultaneous Task and Voltage Scheduling for NoC Systems

Network-on-Chip (NoC) is emerging as a promising communication structure, which is scalable with respect to chip complexity. Meanwhile, latest chip designs are increasingly leveraging multiple voltage-frequency domains for energy-efficiency improvement. In this work, we propose a simultaneous task and voltage scheduling algorithm for energy minimization in NoC based designs. The energy-latency tradeoff is handled by Lagrangian relaxation. The core algorithm is a clustering based approach which not only assigns voltage levels and starting time to each task (or Processing Element) but also naturally finds voltage-frequency clusters. Compared to a recent previous work, which performs task scheduling and voltage assignment sequentially, our method leads to an average of 20 percent energy reduction

Techniques pour l'évaluation et l'amélioration du comportement des technologies émergentes face aux fautes aléatoires

The main objective of this thesis is to develop analysis and mitigation techniques that can be used to face the effects of radiation-induced soft errors - external and internal disturbances produced by radioactive particles, affecting the reliability and safety in operation complex microelectronic circuits. This thesis aims to provide industrial solutions and methodologies for the areas of terrestrial applications requiring ultimate reliability (telecommunications, medical devices, ...) to complement previous work on Soft Errors traditionally oriented aerospace, nuclear and military applications.The work presented uses a decomposition of the error sources, inside the current circuits, to highlight the most important contributors.Single Event Effects in sequential logic cells represent the current target for analysis and improvement efforts in both industry and academia. This thesis presents a state-aware analysis methodology that improves the accuracy of Soft Error Rate data for individual sequential instances based on the circuit and application. Furthermore, the intrinsic imbalance between the SEU susceptibility of different flip-flop states is exploited to implement a low-cost SER improvement strategy.Single Event Transients affecting combinational logic are considerably more difficult to model, simulate and analyze than the closely-related Single Event Upsets. The working environment may cause a myriad of distinctive transient pulses in various cell types that are used in widely different configurations. This thesis presents practical approach to a possible exhaustive Single Event Transient evaluation flow in an industrial setting. The main steps of this process consists in: a) fully characterize the standard cell library using a process and library-aware SER tool, b) evaluate SET effects in the logic networks of the circuit using a variety dynamic (simulation-based) and static (probabilistic) methods and c) compute overall SET figures taking into account the particularities of the implementation of the circuit and its environment.Fault-injection remains the primary method for analyzing the effects of soft errors. This document presents the results of functional analysis of a complex CPU. Three representative benchmarks were considered for this analysis. Accelerated simulation techniques (probabilistic calculations, clustering, parallel simulations) have been proposed and evaluated in order to develop an industrial validation environment, able to take into account very complex circuits. The results obtained allowed the development and evaluation of a hypothetical mitigation scenario that aims to significantly improve the reliability of the circuit at the lowest cost.The results obtained show that the error rate, SDC (Silent Data Corruption) and DUE (Detectable Uncorrectable Errors) can be significantly reduced by hardening a small part of the circuit (Selective mitigation).In addition to the main axis of research, some tangential topics were studied in collaboration with other teams. One of these consisted in the study of a technique for the mitigation of flip-flop soft-errors through an optimization of the Temporal De-Rating (TDR) by selectively inserting delay on the input or output of flip-flops.The Methodologies, the algorithms and the CAD tools proposed and validated as part of the work are intended for industrial use and have been included in a commercial CAD framework that offers a complete solution for assessing the reliability of circuits and complex electronic systems.L'objectif principal de cette thèse est de développer des techniques d'analyse et mitigation capables à contrer les effets des Evènements Singuliers (Single Event Effects) - perturbations externes et internes produites par les particules radioactives, affectant la fiabilité et la sureté en fonctionnement des circuits microélectroniques complexes. Cette thèse à la vocation d'offrir des solutions et méthodologies industrielles pour les domaines d'applications terrestres exigeant une fiabilité ultime (télécommunications, dispositifs médicaux, ...) en complément des travaux précédents sur les Soft Errors, traditionnellement orientés vers les applications aérospatiales, nucléaires et militaires.Les travaux présentés utilisent une décomposition de sources d'erreurs dans les circuits actuels, visant à mettre en évidence les contributeurs les plus importants.Les upsets (SEU) - Evènements Singuliers (ES) dans les cellules logiques séquentielles représentent actuellement la cible principale pour les efforts d'analyse et d'amélioration à la fois dans l'industrie et dans l'académie. Cette thèse présente une méthodologie d'analyse basée sur la prise en compte de la sensibilité de chaque état logique d'une cellule (state-awareness), approche qui améliore considérablement la précision des résultats concernant les taux des évènements pour les instances séquentielles individuelles. En outre, le déséquilibre intrinsèque entre la susceptibilité des différents états des bascules est exploité pour mettre en œuvre une stratégie d'amélioration SER à très faible coût.Les fautes transitoires (SET) affectant la logique combinatoire sont beaucoup plus difficiles à modéliser, à simuler et à analyser que les SEUs. L'environnement radiatif peut provoquer une multitude d'impulsions transitoires dans les divers types de cellules qui sont utilisés en configurations multiples. Cette thèse présente une approche pratique pour l'analyse SET, applicable à des circuits industriels très complexes. Les principales étapes de ce processus consiste à: a) caractériser complètement la bibliothèque de cellules standard, b) évaluer les SET dans les réseaux logiques du circuit en utilisant des méthodes statiques et dynamiques et c) calculer le taux SET global en prenant en compte les particularités de l'implémentation du circuit et de son environnement.L'injection de fautes reste la principale méthode d'analyse pour étudier l'impact des fautes, erreurs et disfonctionnements causés par les évènements singuliers. Ce document présente les résultats d'une analyse fonctionnelle d'un processeur complexe dans la présence des fautes et pour une sélection d'applications (benchmarks) représentatifs. Des techniques d'accélération de la simulation (calculs probabilistes, clustering, simulations parallèles) ont été proposées et évalués afin d'élaborer un environnement de validation industriel, capable à prendre en compte des circuits très complexes. Les résultats obtenus ont permis l'élaboration et l'évaluation d'un hypothétique scénario de mitigation qui vise à améliorer sensiblement, et cela au moindre coût, la fiabilité du circuit sous test. Les résultats obtenus montrent que les taux d'erreur, SDC (Silent Data Corruption) et DUE (Detectable Uncorrectable Errors) peuvent être considérablement réduits par le durcissement d'un petite partie du circuit (protection sélective). D'autres techniques spécifiques ont été également déployées: mitigation du taux de soft-errors des Flip-Flips grâce à une optimisation du Temporal De-Rating par l'insertion sélective de retard sur l'entrée ou la sortie des bascules et biasing du circuit pour privilégier les états moins sensibles.Les méthodologies, algorithmes et outils CAO proposés et validés dans le cadre de ces travaux sont destinés à un usage industriel et ont été valorisés dans le cadre de plateforme CAO commerciale visant à offrir une solution complète pour l'évaluation de la fiabilité des circuits et systèmes électroniques complexes

Adaptive deformable mirror : based on electromagnetic actuators

Refractive index variations in the earth's atmosphere cause wavefront aberrations and limit thereby the resolution in ground-based telescopes. With Adaptive Optics (AO) the temporally and spatially varying wavefront distortions can be corrected in real time. Most implementations in a ground based telescope include a WaveFront Sensor, a Deformable Mirror and a real time wavefront control system. The largest optical telescopes built today have a ~ 1 Om primary mirror. Telescopes with more collecting area and higher resolution are desired. ELTs are currently designed with apertures up to 42m. For these telescopes serious challenges for all parts of the AO system exist. This thesis addresses the challenges for the DM. An 8m class telescope on a representative astronomical site is the starting point. The atmosphere is characterized by the spatial and temporal spectra of Kolmogorov turbulence and the frozen flow assumption. The wavefront fitting error, caused by a limited number of actuators and the temporal error, caused by a limited control bandwidth, are the most important for the DM design. It is shown that ~5000 actuators and 200Hz closed loop bandwidth form a balanced choice between the errors and correct an 8m wavefront in the visible to nearly diffraction limited. An actuator stroke of ~5.6J.!m and ~0.36J.!m inter actuator stroke is thereby needed. Together with the nm's resolution, low power dissipation, no hysteresis and drift, these form the main DM requirements. The design, realization and tests of a new DM that meets these requirements and is extendable and scalable in mechanics, electronics and control to suit further Extremely Large Telescopes (ELTs) is presented. In the DM a few layers are distinguished: a continuous mirror facesheet, the actuator grid and the base frame. In the underlying layer - the actuator grid - low voltage electromagnetic push-pull actuators are located. Identical actuator modules, each with 61 actuators, hexagonally arranged on a 6mm pitch can be placed adjacent to form large grids. The base frame provides a stable and stiff reference. A thin facesheet is needed for low actuator forces and power dissipation, whereby its lower limit is set by the facesheets inter actuator deflection determined by gravity or wind pressure. For both scaling laws for force and dissipation are derived. Minimum power dissipation is achieved when beryllium is used for the mirror facesheet. Pyrex facesheets with 100J.!m thickness are chosen as a good practical, alternative in the prototype development. Struts (00.1 x 8mm) connect the facesheet to the actuators and ensure a smooth surface over the imposed heights and allow relative lateral movement of the facesheet and the actuator grid. Measurements show 3nm RMS surface unflattness from the glued attachment. The stiffness of the actuators form the out-of-plane constraints for the mirror facesheet and determine the mirrors first resonance frequency. and is chosen such that the resonance frequency is high enough to allow the high control bandwidth but not higher that needed to avoid excessive power dissipation and fix points in the surface in case of failure. The electromagnetic variable reluctance actuators designed, are efficient, have low moving mass and have suitable stiffness. Other advantages are the low costs, low driving voltages and negligible hysteresis and drift. The actuators consist of a closed magnetic circuit in which a PM provides static magnetic force on a ferromagnetic core that is suspended in a membrane. This attraction force is increased of decreased by a current through a coil. The actuators are free from mechanical hysteresis, friction and play and therefore have a high positioning resolution with high reproducibility. The actuator modules are build in layers to reduces the number of parts and the complexity of assembly and to improve the uniformity in properties. Dedicated communication and driver electronics are designed. FPGA implemented PWM based voltage drivers are chosen because of their high efficiency and capability to be implemented in large numbers with only a few electronic components. A multidrop LVDS based serial communication is chosen for its low power consumption, high bandwidth and consequently low latency, low communication overhead and extensive possibilities for customization. A flat-cable connects up to 32 electronics modules to a custom communications bridge, which translates the ethernet packages from the control PC into LVDS. Two DMs prototypes were successfully assembled: a 050mm DM with 61 actuators and a 0l50mm DM with 427 actuators. In the second prototype modularity is shown by the assembly of seven identical grids on a common base. The dynamic performance of each actuator is measured, including its dedicated driver and communication. All actuators were found to be functional, indicating that the manufacturing and assembly process is reliable. A nonlinear mathematical model of the actuator was derived describing both its static and dynamic behavior based on equations from the magnetic, mechanic and electric domains. The actuator model was linearized, leading to expressions for the actuator transfer function and properties such as motor constant, coil inductance, actuator stiffness and resonance frequency. From frequency response function measurements these properties showed slight deviations from the values derived from the model, but the statistical spread for the properties was small, stressing the reliability of the manufacturing and assembly process. The mean actuator stiffness and resonance frequency were 0.47kN/m and 1.8kHz respectively, which is close to their design values of 500N/m and 1.9kHz. The time domain response of an actuator to a 4Hz sine voltage was used to determine hysteresis and semi-static nonlinear response of the actuator. This showed the first to be negligible and the second to remain below 5% for ±10J.!m stroke. Measurements showed that in the expected operating range, the total power dissipation is dominated by indirect losses in FPGAs. The static DM performance is validated using interferometric measurements. The measured influence matrix is used to shape the mirror facesheet into the first 28 Zernike modes, which includes the piston term that represents the best flat mirror. The total RMS error is ~25nm for all modes. The dynamic behavior of the DM is validated by measurements. A laser vibrometer is used to measure the displacement of the mirror facesheet, while the actuators are driven by zero-mean, bandlimited, white noise voltage sequence. Using the MOESP system identification algorithm, high-order black-box models are identified with VAF values around 95%. The first resonance frequency identified is 725Hz, and lower than the 974Hz expected from the analytical model. This is attributed to the variations in actuator properties, such as actuator stiffness. The power dissipation in each actuator of the 050mm mirror to correct a typical Von Karmann turbulence spectrum is ~ 1.5m W

Maximising microprocessor reliability through game theory and heuristics

PhD ThesisEmbedded Systems are becoming ever more pervasive in our society, with most routine daily tasks now involving their use in some form and the market predicted to be worth USD 220 billion, a rise of 300%, by 2018. Consumers expect more functionality with each design iteration, but for no detriment in perceived performance. These devices can range from simple low-cost chips to expensive and complex systems and are a major cost driver in the equipment design phase. For more than 35 years, designers have kept pace with Moore's Law, but as device size approaches the atomic limit, layouts are becoming so complicated that current scheduling techniques are also reaching their limit, meaning that more resource must be reserved to manage and deliver reliable operation. With the advent of many-core systems and further sources of unpredictability such as changeable power supplies and energy harvesting, this reservation of capability may become so large that systems will not be operating at their peak efficiency. These complex systems can be controlled through many techniques, with jobs scheduled either online prior to execution beginning or online at each time or event change. Increased processing power and job types means that current online scheduling methods that employ exhaustive search techniques will not be suitable to define schedules for such enigmatic task lists and that new techniques using statistic-based methods must be investigated to preserve Quality of Service. A new paradigm of scheduling through complex heuristics is one way to administer these next levels of processor effectively and allow the use of more simple devices in complex systems; thus reducing unit cost while retaining reliability a key goal identified by the International Technology Roadmap for Semi-conductors for Embedded Systems in Critical Environments. These changes would be beneficial in terms of cost reduction and system exibility within the next generation of device. This thesis investigates the use of heuristics and statistical methods in the operation of real-time systems, with the feasibility of Game Theory and Statistical Process Control for the successful supervision of high-load and critical jobs investigated. Heuristics are identified as an effective method of controlling complex real-time issues, with two-person non-cooperative games delivering Nash-optimal solutions where these exist. The simplified algorithms for creating and solving Game Theory events allow for its use within small embedded RISC devices and an increase in reliability for systems operating at the apex of their limits. Within this Thesis, Heuristic and Game Theoretic algorithms for a variety of real-time scenarios are postulated, investigated, refined and tested against existing schedule types; initially through MATLAB simulation before testing on an ARM Cortex M3 architecture functioning as a simplified automotive Electronic Control Unit.Doctoral Teaching Account from the EPSRC

Stochastic Optimization and Machine Learning Modeling for Wireless Networking

In the last years, the telecommunications industry has seen an increasing interest in the development of advanced solutions that enable communicating nodes to exchange large amounts of data. Indeed, well-known applications such as VoIP, audio streaming, video on demand, real-time surveillance systems, safety vehicular requirements, and remote computing have increased the demand for the efficient generation, utilization, management and communication of larger and larger data quantities. New transmission technologies have been developed to permit more efficient and faster data exchanges, including multiple input multiple output architectures or software defined networking: as an example, the next generation of mobile communication, known as 5G, is expected to provide data rates of tens of megabits per second for tens of thousands of users and only 1 ms latency. In order to achieve such demanding performance, these systems need to effectively model the considerable level of uncertainty related to fading transmission channels, interference, or the presence of noise in the data. In this thesis, we will present how different approaches can be adopted to model these kinds of scenarios, focusing on wireless networking applications. In particular, the first part of this work will show how stochastic optimization models can be exploited to design energy management policies for wireless sensor networks. Traditionally, transmission policies are designed to reduce the total amount of energy drawn from the batteries of the devices; here, we consider energy harvesting wireless sensor networks, in which each device is able to scavenge energy from the environment and charge its battery with it. In this case, the goal of the optimal transmission policies is to efficiently manage the energy harvested from the environment, avoiding both energy outage (i.e., no residual energy in a battery) and energy overflow (i.e., the impossibility to store scavenged energy when the battery is already full). In the second part of this work, we will explore the adoption of machine learning techniques to tackle a number of common wireless networking problems. These algorithms are able to learn from and make predictions on data, avoiding the need to follow limited static program instructions: models are built from sample inputs, thus allowing for data-driven predictions and decisions. In particular, we will first design an on-the-fly prediction algorithm for the expected time of arrival related to WiFi transmissions. This predictor only exploits those network parameters available at each receiving node and does not require additional knowledge from the transmitter, hence it can be deployed without modifying existing standard transmission protocols. Secondly, we will investigate the usage of particular neural network instances known as autoencoders for the compression of biosignals, such as electrocardiography and photo plethysmographic sequences. A lightweight lossy compressor will be designed, able to be deployed in wearable battery-equipped devices with limited computational power. Thirdly, we will propose a predictor for the long-term channel gain in a wireless network. Differently from other works in the literature, such predictor will only exploit past channel samples, without resorting to additional information such as GPS data. An accurate estimation of this gain would enable to, e.g., efficiently allocate resources and foretell future handover procedures. Finally, although not strictly related to wireless networking scenarios, we will show how deep learning techniques can be applied to the field of autonomous driving. This final section will deal with state-of-the-art machine learning solutions, proving how these techniques are able to considerably overcome the performance given by traditional approaches