4,962 research outputs found
Cooperative Synchronization in Wireless Networks
Synchronization is a key functionality in wireless network, enabling a wide
variety of services. We consider a Bayesian inference framework whereby network
nodes can achieve phase and skew synchronization in a fully distributed way. In
particular, under the assumption of Gaussian measurement noise, we derive two
message passing methods (belief propagation and mean field), analyze their
convergence behavior, and perform a qualitative and quantitative comparison
with a number of competing algorithms. We also show that both methods can be
applied in networks with and without master nodes. Our performance results are
complemented by, and compared with, the relevant Bayesian Cram\'er-Rao bounds
HIGH PERFORMANCE CLOCK DISTRIBUTION FOR HIGH-SPEED VLSI SYSTEMS
Tohoku University堀口 進課
Desynchronization: Synthesis of asynchronous circuits from synchronous specifications
Asynchronous implementation techniques, which measure logic delays at run time and activate registers accordingly, are inherently more robust than their synchronous counterparts, which estimate worst-case delays at design time, and constrain the clock cycle accordingly. De-synchronization is a new paradigm to automate the design of asynchronous circuits from synchronous specifications, thus permitting widespread adoption of asynchronicity, without requiring special design skills or tools. In this paper, we first of all study different protocols for de-synchronization and formally prove their correctness, using techniques originally developed for distributed deployment of synchronous language specifications. We also provide a taxonomy of existing protocols for asynchronous latch controllers, covering in particular the four-phase handshake protocols devised in the literature for micro-pipelines. We then propose a new controller which exhibits provably maximal concurrency, and analyze the performance of desynchronized circuits with respect to the original synchronous optimized implementation. We finally prove the feasibility and effectiveness of our approach, by showing its application to a set of real designs, including a complete implementation of the DLX microprocessor architectur
Characterization of optical interconnects
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.Includes bibliographical references (p. 72-75).Interconnect has become a major issue in deep sub-micron technology. Even with copper and low-k dielectrics, parasitic effects of interconnects will eventually impede advances in integrated electronics. One technique that has the potential to provide a paradigm shift is optics. This project evaluates the feasibility of optical interconnects for distributing data and clock signals. In adopting this scheme, variation is introduced by the detector, the waveguides, and the optoelectronic circuit, which includes device, power supply and temperature variations. We attempt to characterize the effects of the aforementioned sources of variation by designing a baseline optoelectronic circuitry and fabricating a test chip which consists of the circuitry and detectors. Simulations are also performed to supplement the effort. The results are compared with the performance of traditional metal interconnects. The feasibility of optical interconnects is found to be sensitive to the optoelectronic circuitry used. Variation effects from the devices and operating conditions have profound impact on the performance of optical interconnects since they introduce substantial skew and delay in the otherwise ideal system.by Shiou Lin Sam.S.M
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