Improved natural balancing with modified phase shifted PWM for single-leg five-level flying-capacitor converters

Flying capacitor converters (FCCs), as most multilevel converter topologies, require a balancing mechanism of the capacitor voltages. FCCs have the valuable property of natural voltage balancing when a special modulation technique is used. The classic methods, like Phase-Shifted Pulse Width Modulation (PS-PWM), result in very slow balancing for some duty ratio ranges. Previous work showed that for a single-leg five-level FCC one time constant is infinite for a zero desired output voltage. In this paper, a modified PS-PWM scheme for a single-leg fivelevel FCC is presented which results in faster balancing over the total duty ratio range. The modified PS-PWM scheme is studied, resulting in an averaged voltage balancing model. This model is verified using simulations and experiments. The modified PS-PWM scheme solves the slow balancing problems of the normal PS-PWM method for odd-level FCCs, while maintaining the passive control property, and it provides a self-precharge capability

An area-time efficient FPGA-implementation of online finite-set model based predictive controllers for flying capacitor inverters

Recently there has been an increase in the use of model-based predictive control (MBPC) for power-electronic converters. Especially for flying-capacitor multilevel converters (FCC) this offers an interesting possibility to simultaneously control output current and the capacitor voltages. The computational burden however is very high and often restrictive for a good implementation. In this paper a time and resource efficient design methodology is presented for the FPGA implementation of FCC MBPC. The control is fully implemented in programmable digital logic. Due to a parallel processing for the three converter phases and a fully pipelined calculation of the prediction stage an area-time efficient implementation is realized. Furthermore, this is achieved by using a high-level design tool. The implementation aspects for 3, 4 and 5-level FC inverters are discussed, with a focus on the 4-level case

Design, control and testing of a modular multilevel converter with a single cell per arm in grid-forming and grid-following operations for scaled-down experimental platforms

Modular multilevel converters (MMC) can be used in several applications, especially (but not only) in high-voltage direct current (HVDC) and STATCOM. In order to develop experimental scaled-down test benches for lab validation, several projects have developed MMCs with a limited number of cells, but they need to use pulse width modulation (PWM) techniques to achieve acceptable power quality (because nearest level modulation (NLM), common in HVDC applications with hundreds of levels, cannot achieve sufficient power quality unless the number of cells is high enough). The present paper proposes a new concept which is based on designing arms with a single cell. This allows to have the simplest possible converter that maintains the structure of an MMC. While all the inner controllers of large-scale HVDC MMCs are included, the only remarkable difference is that PWM is used and NLM cannot be implemented. As this is also a limitation for other low voltage MMC, the proposed concept is suggested for scaled-down low voltage applications. The paper includes the design and construction of the converter, the definition and implementation of the converter controllers, and the converter testing, with detailed dynamic simulations and an experimental setup.Peer ReviewedPostprint (published version

A monopolar symmetrical hybrid cascaded DC/DC converter for HVDC interconnections

With the rapid development of voltage source converter (VSC) based high voltage direct current (HVDC) transmission, it is an irresistible trend that HVDC grid will come into being. High-voltage and high-power DC/DC converters will serve as DC transformers in HVDC grid to interconnect DC lines with different voltage ratings. This paper proposes a monopolar symmetrical DC/DC converter which is composed of cascaded half-bridge sub-modules (SMs) and series-connected IGBTs. This hybrid topology features low capital costs, high efficiency, small footprint, and bidirectional power transfer capability. Operation principle, parameter design, and the control strategies of this topology are introduced. A 480MW, ±500kV/±160kV monopolar symmetrical DC/DC converter is simulated to verify its performance and evaluate the efficiency. In addition, a downscaled prototype rated at 2.4kW, ±300V/±100V has been built and tested. Experimental results further validate the effectiveness of the proposed DC/DC converter

Modular multilevel converter based HVDC transmission system for offshore wind farms

This doctoral thesis falls within the scope of electronic power converters oriented to high voltage transmission applications, in particular the power generated in remote offshore wind farms by means of HVDC subsea cables. This research is focused on the Modular Multilevel Converter (MMC) with two level submodules but also with multilevel topology submodules such as 3L-FC (three level flying capacitors) and 3L-NPC (three level neutral point capacitors). The main contribution of this thesis is the developed PWM based modulation strategy which allows the balancing of the total amount of submodules capacitors. It is applicable to the aforementioned submodule topologies under different working conditions as evidenced by experimental results

High power modular converters for grid interface applications

Scientists at European Organization for Nuclear Research (CERN) are currently conducting feasibility studies for the Compact linear collider (CLIC); their proposed next experimental setup for gathering information on the fundamental particles of matter. This experiment will involve the simultaneous pulsing of 1300 klystron modulators to produce a 140us, 39GW pulse with a 50 Hz repetition rate. This proposal presents many demands for the connected power system as an effort is made to "hide" this pulse from the local distribution network - instead drawing only the constant average power of approximately 300MW. This challenge is considered in this work. In order to understand the optimal approach both the power system architectures and power electronics interfaces must be considered simultaneously. An approach to the optimisation of the power system architecture is described in this thesis. It is clear from this exercise that the optimum power converter topology for the interface between the electricity distribution network and the klystron modulators is the Modular Multilevel Converter (MMC). This converter is mainly used in modern HVDC transmission circuits as a result of its high efficiency and ability to produce high quality AC waveforms. Pulsing of the klystron modulators does however create further challenges for the inner control loops of an MMC. The placement of the pulse can create imbalances in the DC capacitors of the MMC submodules which may result in tripping of the converter if not corrected. This thesis proposes three arm balancing solutions to be applied together with the decoupled AC and DC side controller designed for the specified application. These proposed solutions to the aforementioned problems are successfully validated using simulation work in PLECS and using data from a laboratory scale prototype of one of the MMC interface power converters

High power modular converters for grid interface applications

Scientists at European Organization for Nuclear Research (CERN) are currently conducting feasibility studies for the Compact linear collider (CLIC); their proposed next experimental setup for gathering information on the fundamental particles of matter. This experiment will involve the simultaneous pulsing of 1300 klystron modulators to produce a 140us, 39GW pulse with a 50 Hz repetition rate. This proposal presents many demands for the connected power system as an effort is made to "hide" this pulse from the local distribution network - instead drawing only the constant average power of approximately 300MW. This challenge is considered in this work. In order to understand the optimal approach both the power system architectures and power electronics interfaces must be considered simultaneously. An approach to the optimisation of the power system architecture is described in this thesis. It is clear from this exercise that the optimum power converter topology for the interface between the electricity distribution network and the klystron modulators is the Modular Multilevel Converter (MMC). This converter is mainly used in modern HVDC transmission circuits as a result of its high efficiency and ability to produce high quality AC waveforms. Pulsing of the klystron modulators does however create further challenges for the inner control loops of an MMC. The placement of the pulse can create imbalances in the DC capacitors of the MMC submodules which may result in tripping of the converter if not corrected. This thesis proposes three arm balancing solutions to be applied together with the decoupled AC and DC side controller designed for the specified application. These proposed solutions to the aforementioned problems are successfully validated using simulation work in PLECS and using data from a laboratory scale prototype of one of the MMC interface power converters

Modular platform for research in microgrids

The present Ph.D. thesis has been developed following an Industrial Ph.D. program and verses on developing a commercial piece of equipment for teknoCEA, a spin-off company from CITCEA-UPC. The thesis is centered on developing power electronics-based emulation systems for research in microgrids. Lately, the use of power electronics-based emulation systems is drawing substantial attention in the field of microgrids because their characteristics substantially facilitate research in laboratory facilities. First, the suitability of different topologies for implementing an emulation platform is analyzed. The focus is set on the topologies adjustability to implement various types of emulation systems. The analysis determines the most appropriate number of legs for the platform. A comparative analysis is done between two-level and multi-level topologies to determine their suitability based on different aspects. Moreover, the analysis confirms the usefulness of wide-bandgap semiconductors for this type of application. Next, a control structure is proposed together with its implementation in a low-cost microcontroller based on a modular software architecture. The control strategy based on fractional proportional resonant controllers for AC emulation systems provides a control system with high control bandwidth while keeping a low computational cost. The control strategy for DC emulation systems is provided to reach a fast transient response and immunity to external disturbances, which is key for good emulation of electric systems. The modular software architecture provides a software framework easily adjustable to the needs of multiple emulation systems. That allows the implementation of the multiple control strategies with minimum changes. Additionally provides a graphical representation of the software architecture from a static and dynamic point of view. Last, the reliability of the proposed platform is assessed based on the reliability curves provided in the literature. The reliability analysis is centered on the semiconductors and capacitors. It provides evidence that emulation systems typical currents and voltages clearly affect their reliability. For the capacitors reliability assessment, a thermal modeling methodology is proposed to overcome the limitations of standard approximations. The methodology is based on anisotropic modeling of the capacitor winding. Finally, the reliability analysis establishes the guidelines to assess the platform reliability if a given mission profile is provided.La present tesi doctoral s'ha dut a terme seguint un programa de doctorat industrial. La tesi exposa el desenvolupament d'un equip comercial per a teknoCEA, una spin-off del CITCEA-UPC. La tesi es centra en el desenvolupament d'emuladors basats en electrònica de potència per recerca en el camp de les microxarxes. Darrerament, l'ús d'emuladors s'ha estès ja que les seves característiques faciliten molt la recerca en laboratoris. En primer lloc, s'analitza la idoneïtat de diferents topologies per implementar una plataforma d'emulació. El focus recau en la capacitat de diferents topologies per ajustar-se a la implementació de múltiples sistemes d'emulació. L'anàlisi determina el número òptim de branques. Un anàlisi comparatiu entre topologies dos nivells i multinivell permet determinar-ne la idoneïtat en funció de diferents aspectes. A continuació, es proposa una estructura de control juntament amb la seva implementació en un microcontrolador de baix cost a partir d'una arquitectura de programari modular. L'estratègia de control basada en controladors FPR (fractional proportional resonant) per a emuladors de corrent altern, proporciona un sistema de control amb un gran ample de banda amb un baix cost computacional. L'estratègia de control proposada per emuladors de corrent continu proporciona una resposta transitòria ràpida i elevada immunitat a pertorbacions, aspecte clau per a una bona emulació de sistemes elèctrics. L'arquitectura de programari modular proporciona un marc de programari fàcilment ajustable a les necessitats de múltiples emuladors. Això permet la implementació de les múltiples estratègies de control amb canvis mínims. A més, ofereix una representació gràfica de l'arquitectura del programari tant des d'un punt de vista estàtic com dinàmic. Finalment, s'avalua la fiabilitat de la plataforma a partir de les corbes de fiabilitat disponibles a la bibliografia científica. L'anàlisi es centra en els semiconductors i condensadors i proporciona evidència que els corrents i les tensions típics en emuladors afecten la seva fiabilitat. Per a l'avaluació de la fiabilitat dels condensadors, es proposa una metodologia de modelització tèrmica que permet superar les limitacions de les metodologies emprades típicament en la bibliografia científica. La metodologia es basa en el modelatge del bobinat del condensador com un element anisòtrop. Per últim, l'anàlisi de fiabilitat estableix les pautes per avaluar la fiabilitat de la plataforma en el cas que es proporcioni un perfil d'operació determinat.Postprint (published version