Application of Fuzzy Logic for Performance Enhancement of Drives

Fuzzy logic shows enormous potential for advancing power electronics technology. Its application to DC and AC drives control is discussed here. Initially, a phase-controlled bridge converter DC drive was considered. Analysis of converter performance at continuous and discontinuous conduction modes was first conducted. Fuzzy control was used to linearize the transfer characteristics of the converter in discontinuous conduction mode. It was then extended to current and speed loops, replacing the conventional proportional-integral controllers. The control algorithms were developed in detail, and verified by PC-SIMNON (developed by Lund Institute of Technology Sweden) digital simulation. Significant performance improvement was achieved over conventional control methods. Efficiency optimization of an indirect vector controlled induction motor drive was next considered. An accurate loss model of the converter induction machine system was first developed. Steady-state fundamental and harmonics loss characteristics, besides the dynamic of the machine were analyzed and incorporated in the model, resulting in a new synchronous frame dynamic De-Qe equivalent circuit. The converter system has been modeled accurately for conduction and switching losses. The lossy models were then used in the validation of the fuzzy logic based on-line efficiency optimization control. At steady-state, the fuzzy controller adaptively changes the excitation current on the basis of measured input power, until the maximum efficiency point is reached. The pulsating torque, due to flux reduction, has been compensated by an ingenious feedforward scheme. During transients, rated flux is established, to get the best transient response. After a comprehensive simulation study, an experimental 5 hp drive system was tested, with the proposed controller implemented on a Texas Instrument TMS320C25 digital signal processor, and the theoretical development was fully validated. Finally, fuzzy logic was applied in combination with model-reference adaptive control (MRAC) technique to slip gain tuning of an indirect vector controlled induction motor drive. The MRAC methods based on reactive power and D-axis voltage were combined through a weighting factor, generated by a fuzzy controller, that ensures the use of the best method for any point in the torque-speed plane. A second fuzzy controller tunes the slip gain based on combined detuning error and its slope. The drive performance was extensively investigated through simulations and experiments. The results confirmed the validity of the proposed method

NSSDC Conference on Mass Storage Systems and Technologies for Space and Earth Science Applications, volume 2

This report contains copies of nearly all of the technical papers and viewgraphs presented at the NSSDC Conference on Mass Storage Systems and Technologies for Space and Earth Science Application. This conference served as a broad forum for the discussion of a number of important issues in the field of mass storage systems. Topics include the following: magnetic disk and tape technologies; optical disk and tape; software storage and file management systems; and experiences with the use of a large, distributed storage system. The technical presentations describe, among other things, integrated mass storage systems that are expected to be available commercially. Also included is a series of presentations from Federal Government organizations and research institutions covering their mass storage requirements for the 1990's

Available Techniques for Magnetic Hard Disk Drive Read Channel Equalization

This paper presents an extensive, non-exhaustive, study of available hard disk drive read channel equalization techniques used in the storage and readback of magnetically stored information. The physical elements and basic principles of the storage processes are introduced together with the basic theoretical definitions and models. Both read and write processes in magnetic storage are explained along with the definition of simple key concepts such as user bit density, intersymbol interference, linear and areal density, read head pulse response models, and coding algorithm

Design of adaptive analog filters for magnetic front-end read channels

Esta tese estuda o projecto e o comportamento de filtros em tempo contínuo de muito-alta-frequência. A motivação deste trabalho foi a investigação de soluções de filtragem para canais de leitura em sistemas de gravação e reprodução de dados em suporte magnético, com custos e consumo (tamanho total inferior a 1 mm2 e consumo inferior a 1mW/polo), inferiores aos circuitos existentes. Nesse sentido, tal como foi feito neste trabalho, o rápido desenvolvimento das tecnologias de microelectrónica suscitou esforços muito significativos a nível mundial com o objectivo de se investigarem novas técnicas de realização de filtros em circuito integrado monolítico, especialmente em tecnologia CMOS (Complementary Metal Oxide Semiconductor). Apresenta-se um estudo comparativo a diversos níveis hierárquicos do projecto, que conduziu à realização e caracterização de soluções com as características desejadas. Num primeiro nível, este estudo aborda a questão conceptual da gravação e transmissão de sinal bem como a escolha de bons modelos matemáticos para o tratamento da informação e a minimização de erro inerente às aproximações na conformidade aos princípios físicos dos dispositivos caracterizados. O trabalho principal da tese é focado nos níveis hierárquicos da arquitectura do canal de leitura e da realização em circuito integrado do seu bloco principal – o bloco de filtragem. Ao nível da arquitectura do canal de leitura, apresenta-se um estudo alargado sobre as metodologias existentes de adaptação de sinal e recuperação de dados em suporte magnético. Este desígnio aparece no âmbito da proposta de uma solução de baixo custo, baixo consumo, baixa tensão de alimentação e baixa complexidade, alicerçada em tecnologia digital CMOS, para a realização de um sistema DFE (Decision Feedback Equalization) com base na igualização de sinal utilizando filtros integrados analógicos em tempo contínuo. Ao nível do projecto de realização do bloco de filtragem e das técnicas de implementação de filtros e dos seus blocos constituintes em circuito integrado, concluiu-se que a técnica baseada em circuitos de transcondutância e condensadores, também conhecida como filtros gm-C (ou transcondutância-C), é a mais adequada para a realização de filtros adaptativos em muito-alta-frequência. Definiram-se neste nível hierárquico mais baixo, dois subníveis de aprofundamento do estudo no âmbito desta tese, nomeadamente: a pesquisa e análise de estruturas ideais no projecto de filtros recorrendo a representações no espaço de estados; e, o estudo de técnicas de realização em tecnologia digital CMOS de circuitos de transcondutância para a implementação de filtros integrados analógicos em tempo contínuo. Na sequência deste estudo, apresentam-se e comparam-se duas estruturas de filtros no espaço de estados, correspondentes a duas soluções alternativas para a realização de um igualador adaptativo realizado por um filtro contínuo passa-tudo de terceira ordem, para utilização num canal de leitura de dados em suporte magnético. Como parte constituinte destes filtros, apresenta-se uma técnica de realização de circuitos de transcondutância, e de realização de condensadores lineares usando matrizes de transístores MOSFET para processamento de sinal em muito-alta-frequência realizada em circuito integrado usando tecnologia digital CMOS submicrométrica. Apresentam-se métodos de adaptação automática capazes de compensar os erros face aos valores nominais dos componentes, devidos às tolerâncias inerentes ao processo de fabrico, para os quais apresentamos os resultados de simulação e de medição experimental obtidos. Na sequência deste estudo, resultou igualmente a apresentação de um circuito passível de constituir uma solução para o controlo de posicionamento da cabeça de leitura em sistemas de gravação/reprodução de dados em suporte magnético. O bloco proposto é um filtro adaptativo de primeira ordem, com base nos mesmos circuitos de transcondutância e técnicas de igualação propostos e utilizados na implementação do filtro adaptativo de igualação do canal de leitura. Este bloco de filtragem foi projectado e incluído num circuito integrado (Jaguar) de controlo de posicionamento da cabeça de leitura realizado para a empresa ATMEL em Colorado Springs, e incluído num produto comercial em parceria com uma empresa escocesa utilizado em discos rígidos amovíveis.This thesis studies the design and behavior of continuous-time very-high-frequency filters. The motivation of this work was the search for filtering solutions for the readchannel in recording and reproduction of data on magnetic media systems, with costs and consumption (total size less than 1 mm2 and consumption under 1mW/pole), lower than the available circuits. Accordingly, as was done in this work, the rapid development of microelectronics technology raised very significant efforts worldwide in order to investigate new techniques for implementing such filters in monolithic integrated circuit, especially in CMOS technology (Complementary Metal Oxide Semiconductor). We present a comparative study on different hierarchical levels of the project, which led to the realization and characterization of solutions with the desired characteristics. In the first level, this study addresses the conceptual question of recording and transmission of signal and the choice of good mathematical models for the processing of information and minimization of error inherent in the approaches and in accordance with the principles of the characterized physical devices. The main work of this thesis is focused on the hierarchical levels of the architecture of the read channel and the integrated circuit implementation of its main block - the filtering block. At the architecture level of the read channel this work presents a comprehensive study on existing methodologies of adaptation and signal recovery of data on magnetic media. This project appears in the sequence of the proposed solution for a lowcost, low consumption, low voltage, low complexity, using CMOS digital technology for the performance of a DFE (Decision Feedback Equalization) based on the equalization of the signal using integrated analog filters in continuous time. At the project level of implementation of the filtering block and techniques for implementing filters and its building components, it was concluded that the technique based on transconductance circuits and capacitors, also known as gm-C filters is the most appropriate for the implementation of very-high-frequency adaptive filters. We defined in this lower level, two sub-levels of depth study for this thesis, namely: research and analysis of optimal structures for the design of state-space filters, and the study of techniques for the design of transconductance cells in digital CMOS circuits for the implementation of continuous time integrated analog filters. Following this study, we present and compare two filtering structures operating in the space of states, corresponding to two alternatives for achieving a realization of an adaptive equalizer by the use of a continuous-time third order allpass filter, as part of a read-channel for magnetic media devices. As a constituent part of these filters, we present a technique for the realization of transconductance circuits and for the implementation of linear capacitors using arrays of MOSFET transistors for signal processing in very-high-frequency integrated circuits using sub-micrometric CMOS technology. We present methods capable of automatic adjustment and compensation for deviation errors in respect to the nominal values of the components inherent to the tolerances of the fabrication process, for which we present the simulation and experimental measurement results obtained. Also as a result of this study, is the presentation of a circuit that provides a solution for the control of the head positioning on recording/playback systems of data on magnetic media. The proposed block is an adaptive first-order filter, based on the same transconductance circuits and equalization techniques proposed and used in the implementation of the adaptive filter for the equalization of the read channel. This filter was designed and included in an integrated circuit (Jaguar) used to control the positioning of the read-head done for ATMEL company in Colorado Springs, and part of a commercial product used in removable hard drives fabricated in partnership with a Scottish company

Modeling and Control of Power Electronics Interfaced Load for Transmission Power Network Analysis

The penetration level of power electronics (PE) interfaced loads has been gradually increasing in recent years. It is beneficial to equip the electric load with a PE interface since it allows for more advanced control of the load performance. Furthermore, the increasing penetration of PE interfaced loads will bring both challenges and opportunities to power network resilience and reliability. However, the lack of modeling and control design for PE interfaced load units in the transmission-level power network analysis, especially for these high-penetrated high-power-rating load applications, limits the accuracy of evaluating the dynamic performance and stability status of the power network. Additionally, the complex configuration and high bandwidth dynamic performance of the PE interfaced load computationally prohibit the model development in transient stability (TS) simulation programs. Therefore, the dynamic PE interfaced load model can be characterized considering the following aspects: 1) Utilize the real-time experimental platform to represent the PE load dynamic performance since the power testbed can reflect the power grid operation with more robustness. 2) Adapt the simplified PE-based model to TS simulation tools, which focus on grid electromechanical transients and oscillations between 0.1 and 3 Hz. Research of the PE interfaced load towards its modeling and control design in different simulation environments and the flexible contribution to the grid operation has been conducted. First, the variable speed drive (VSD) based motor load is studied as a typical PE interfaced load, which can actively interact with power grid operation. The model of VSD load is introduced and applied to the power emulator for the multi-converter-based hardware testbed (HTB) in the Center of Ultra-wide-area Resilient Electric Energy Transmission Network (CURENT). Second, the aggregated performance of multiple VSD load units with grid frequency support function is characterized. Third, the fast electric vehicle (EV) charging unit is studied as a typical PE interfaced load with high power consumption. The generic model of EV charger load is developed based on the detailed switching model. The accuracy of the proposed EV charger load TS model has been verified by comparing it to simulation results of the equivalent electromagnetic (EMT) model

Stability challenges and solutions in current-mode controlled power electronic converters

This dissertation focuses on stability issues in single-staged and multi-staged current controlled power electronic converters. Most current-mode control (CMC) approaches suffer from sub-harmonic oscillations. An external ramp is usually added to solve this problem. However, to guarantee stability this ramp has to be designed for the worst possible case which consequently over damps the response. Adaptive slope compensation (ASC) methods are the solution for this problem. In paper 1 of this dissertation, first three ASC methods will be investigated and analyzed through their small signal models. Then, through simulation analyses and experimental test of a variable-input voltage converter the results will be validated. Two of the methods studies in the first paper are peak CMC methods and the last one is called the projected cross point control (PCPC) approach. This method is relatively new. Therefore, a detailed discussion of the principles of operation of PCPC will be presented in paper 2. In addition, the small signal model of PCPC is developed and discussed through simulation and experimental analyses in the second paper of this dissertation. Peak, average, and hysteresis CMC schemes are used for comparison. In paper 3, the stability issues which arise in multistage converters will be addressed. A solid state transformer (SST) as an example of a multistage converter will be studied. A comprehensive small signal modeling will be conducted which helps for stability analysis of SST. Time domain simulations in Computer Aided Design software (PSCAD) are presented which validates the frequency domain analysis --Abstract, page iv

Dynamic flowgraph methodology for reliability modelling of networked control systems: with application to a nuclear-based hydrogen production plant

The use of communication networks in digital control systems introduces stability and reliability concerns. Standard reliability and safety assessment methods need further modification to accommodate the issue in the reliability assessment of networked control systems. In this thesis, it is demonstrated that the Dynamic Flowgraph Methodology (DFM) can be extended to model networked control systems. The modelling of the communication network influence on the performance of the control system is presented. The areas that can affect the reliability of the control system are identified using the methodology. The thesis also presents the application of the DFM to a nuclear-based thermochemical water splitting process for hydrogen production, the Copper-Chlorine (Cu-Cl) cycle. The architecture of a networked control system and configuration of instrumentation and control systems for the hydrogen production plant are proposed in the thesis