884 research outputs found

    Analysis and Characterization of a SiGe BiCMOS Low Power Operational Amplifier

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    Integrated circuit design for space applications can require radiation immunity, cryogenic operation and low power consumption. This thesis provides analysis and characterization of a SiGe BiCMOS low power operational amplifier (op amp) designed for lunar surface applications. The op amp has been fabricated on a commercially available 0.35-micron Silicon-Germanium (SiGe) BiCMOS process. The Heterojunction bipolar transistors (HBT) available in the SiGe process have been used in this op amp to take advantage of the total ionizing dose (TID) irradiation immunity and superb cryogenic operation, along with PMOS devices that show better TID immunity than their NMOS counterparts. The key features of the op amp include rail-to-rail output voltage swing, low input offset voltage, high open-loop gain and low supply current. The characterization of op amp is done for extreme temperatures and the results demonstrate that the op amp is fully functional across the lunar surface temperature range of −180°C to +120°C. The wide temperature operation of this op amp is tested using different bias current techniques such as proportional-to-absolute-temperature current, constant current and constant inversion coefficient current sources to investigate optimal biasing strategies for BiCMOS analog design. In addition, the SiGe BiCMOS low power op amp provides lower power consumption with the same or better unity-gain bandwidth when compared to a CMOS op amp with similar circuit topology

    Implementation of a sigma delta modulator for a class D audio power amplifier

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    Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadore

    A New Approach to Biasing Design of Analog Circuits

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    Noise Efficient Integrated Amplifier Designs for Biomedical Applications

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    The recording of neural signals with small monolithically integrated amplifiers is of high interest in research as well as in commercial applications, where it is common to acquire 100 or more channels in parallel. This paper reviews the recent developments in low-noise biomedical amplifier design based on CMOS technology, including lateral bipolar devices. Seven major circuit topology categories are identified and analyzed on a per-channel basis in terms of their noise-efficiency factor (NEF), input-referred absolute noise, current consumption, and area. A historical trend towards lower NEF is observed whilst absolute noise power and current consumption exhibit a widespread over more than five orders of magnitude. The performance of lateral bipolar transistors as amplifier input devices is examined by transistor-level simulations and measurements from five different prototype designs fabricated in 180 nm and 350 nm CMOS technology. The lowest measured noise floor is 9.9 nV/√Hz with a 10 µA bias current, which results in a NEF of 1.2

    The Measurement of AM noise of Oscillators

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    The close-in AM noise is often neglected, under the assumption that it is a minor problem as compared to phase noise. With the progress of technology and of experimental science, this assumption is no longer true. Yet, information in the literature is scarce or absent. This report describes the measurement of the AM noise of rf/microwave sources in terms of Salpha(f), i.e., the power spectrum density of the fractional amplitude fluctuation alpha. The proposed schemes make use of commercial power detectors based on Schottky and tunnel diodes, in single-channel and correlation configuration. There follow the analysis of the front-end amplifier at the detector output, the analysis of the methods for the measurement of the power-detector noise, and a digression about the calibration procedures. The measurement methods are extended to the relative intensity noise (RIN) of optical beams, and to the AM noise of the rf/microwave modulation in photonic systems. Some rf/microwave synthesizers and oscillators have been measured, using correlation and moderate averaging. As an example, the flicker noise of a low-noise quartz oscillator (Wenzel 501-04623E) is Salpha = 1.15E-13/f, which is equivalent to an Allan deviation of sigma_alpha = 4E-7. The measurement systems described exhibit the world-record lowest background noise.Comment: 39 pages, 22 figures, 8 tables, 21 references, list of symbol

    Design of Analog CMOS Circuits for Batteryless Implantable Telemetry Systems

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    A wireless biomedical telemetry system is a device that collects biomedical signal measurements and transmits data through wireless RF communication. Testing medical treatments often involves experimentation on small laboratory animals, such as genetically modified mice and rats. Using batteries as a power source results in many practical issues, such as increased size of the implant and limited operating lifetime. Wireless power harvesting for implantable biomedical devices removes the need for batteries integrated into the implant. This will reduce device size and remove the need for surgical replacement due to battery depletion. Resonant inductive coupling achieves wireless power transfer in a manner modelled by a step down transformer. With this methodology, power harvesting for an implantable device is realized with the use of a large primary coil external to the subject, and a smaller secondary coil integrated into the implant. The signal received from the secondary coil must be regulated to provide a stable direct current (DC) power supply, which will be used to power the electronics in the implantable device. The focus of this work is on development of an electronic front-end for wireless powering of an implantable biomedical device. The energy harvesting front-end circuit is comprised of a rectifier, LDO regulator, and a temperature insensitive voltage reference. Physical design of the front-end circuit is developed in 0.13um CMOS technology with careful attention to analog layout issues. Post-layout simulation results are presented for each sub-block as well as the full front-end structure. The LDO regulator operates with supply voltages in the range of 1V to 1.5V with quiescent current of 10.5uA The complete power receiver front-end has a power conversion efficiency of up to 29%

    128 mA CMOS LDO with 108 db PSRR at 2.4 MHz frequency

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    A low dropout (LDO) voltage regulator with high power supply rejection ratio (PSRR) and low temperature coefficient (TC) is presented in this paper. Large 1µF off-chip load capacitor is used to achieve the high PSRR. However, this decreases the gain and pushes the LDO’s output pole to lower frequency causing the circuit to become unstable. The proposed LDO uses rail-to-rail folded cascode amplifier to compensate the gain and stability problems. 2nd order curvature characteristic is used in bandgap voltage reference circuit that is applied at the input of the amplifier to minimize the TC. The characteristic is achieved by implementing MOSFET transistors operate in weak and strong inversions. The LDO is designed using 0.18µm CMOS technology and achieves a constant 1.8V output voltage for input voltages from 3.2V to 5V and load current up to a 128mA at temperature between -40°C to 125°C. The proposed LDO is targeted for RF application which has stringent requirement on noise rejection over a broad range of frequency

    Using Analog Scrambling Circuits for Automotive Sensor Integrity and Authenticity

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    The automotive domain rapidly increases the embedded amount of complex and interconnected electronics systems. A considerable proportion of them are real-time safety-critical devices and must be protected against cybersecurity attacks. Recent regulations impose carmakers to safeguard vehicles from replacing trusted electronic hardware and manipulating the information collected by sensors. Analog sensors are critical elements whose security is now strictly regulated by the new UN R155 recommendation, but it lacks well-developed and established solutions. This work adds integrity and authentication to automotive analog sensors by proposing a schema to create analog signatures based on a scrambling mechanism implemented with commercial-of-the-shelf (COTS) operational amplifiers. The proposed architecture implements a hardware secret key and a hard-to-invert exponential function to generate a signal’s signature. A prototype of the circuit was implemented and simulated on LTspice. Preliminary results show the feasibility of the proposed schema and provide interesting hints for further developments to increase the robustness of the approach

    High-Gain Transimpedance Amplifier With DC Photodiode Current Rejection

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    This master\u27s thesis deals with the design of a differential high-gain transimpedance amplifier in TSMC\u27s 0.18 um mixed signal process that utilizes a DC photodiode current cancellation loop and a switching automatic gain control (AGC) with a bilinear gain curve. The amplifier is designed to satisfy the demands of Optical Coherence Tomography applications where the receiver is expected to measure the envelope power of an amplitude modulated sinusoidal optical signal that incorporates a large DC component. Methods of increasing dynamic range and gain linearity through the use of DC photodiode current cancellation and bilinear gain are explored. Effects of changing DC photodiode current on the overall system response is also demonstrated
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