Design, analysis and evaluation of sigma-delta based beamformers for medical ultrasound imaging applications

The inherent analogue nature of medical ultrasound signals in conjunction with the abundant merits provided by digital image acquisition, together with the increasing use of relatively simple front-end circuitries, have created considerable demand for single-bit beamformers in digital ultrasound imaging systems. Furthermore, the increasing need to design lightweight ultrasound systems with low power consumption and low noise, provide ample justification for development and innovation in the use of single-bit beamformers in ultrasound imaging systems. The overall aim of this research program is to investigate, establish, develop and confirm through a combination of theoretical analysis and detailed simulations, that utilize raw phantom data sets, suitable techniques for the design of simple-to-implement hardware efficient digital ultrasound beamformers to address the requirements for 3D scanners with large channel counts, as well as portable and lightweight ultrasound scanners for point-of-care applications and intravascular imaging systems. In addition, the stability boundaries of higher-order High-Pass (HP) and Band-Pass (BP) Σ−Δ modulators for single- and dual- sinusoidal inputs are determined using quasi-linear modeling together with the describing-function method, to more accurately model the modulator quantizer. The theoretical results are shown to be in good agreement with the simulation results for a variety of input amplitudes, bandwidths, and modulator orders. The proposed mathematical models of the quantizer will immensely help speed up the design of higher order HP and BP Σ−Δ modulators to be applicable for digital ultrasound beamformers. Finally, a user friendly design and performance evaluation tool for LP, BP and HP modulators is developed. This toolbox, which uses various design methodologies and covers an assortment of modulators topologies, is intended to accelerate the design process and evaluation of modulators. This design tool is further developed to enable the design, analysis and evaluation of beamformer structures including the noise analyses of the final B-scan images. Thus, this tool will allow researchers and practitioners to design and verify different reconstruction filters and analyze the results directly on the B-scan ultrasound images thereby saving considerable time and effort

Design and Implementation of Novel FPGA Based Time-Interleaved Variable Centre-Frequency Digital Sigma-Delta Modulators

Novel, multi-path, time-interleaved digital sigma-delta modulators that can operate at any arbitrary frequency from DC to Nyquist are designed, analysed and synthesized in this study. Dual- and quadruple-path fourth-order Butterworth, Chebyshev, Inverse Chebyshev and Elliptical based digital sigma-delta modulators, which offer designers the flexibility of specifying the centre-frequency, pass-band/stop-band attenuation as well as the signal bandwidth are presented. These topologies are compared in terms of their signal-to-noise ratios, hardware complexity, stability, tonality and sensitivity to non-idealities. Detailed simulations performed at the behavioural-level in MATLAB are compared with the experimental results of the FPGA implementation of the designed modulators. The signal-to-noise ratios between the simulated and empirical results are shown to be different by not more than 3-5 dBs. Furthermore, this paper presents the mathematical modelling and evaluation of the tones caused by the finite wordlengths of these digital multi-path sigma-delta modulators when excited by sinusoidal input signals

Nonlinear Model-Based Approach for Accurate Stability Prediction of One-Bit Higher-Order Delta-Sigma (Δ-Σ)Modulators

The present approaches on predicting stability of Delta-Sigma (Δ-Σ) modulators are mostly confined to DC inputs. This poses limitations as practical applications of Δ-Σ modulators involve a wide range of signals other than DC. In this paper, a quasi-linear model for Δ-Σ modulators with nonlinear feedback control analysis is presented that accurately predicts the stability of higher-order single-loop 1-bit Δ-Σ modulators for various types of input signals such as single-sinusoids, dual-sinusoids, multiple-sinusoids and Gaussian. Theoretical values are shown to match closely with simulation results. The results of this paper would significantly speed up the design and evaluation of higher-order single-loop 1-bit Δ-Σ modulators for various applications including those that may require multiple-sinusoidal inputs or any general input composed of a finite number of sinusoidal components, circumventing the need to perform detailed time-consuming simulations to quantify stability limits. By using the proposed method, the difference between the predicted and the actual stable amplitude limits results in an error of less than 1 dB in the in-band Signal-to-Noise Ratio (SNR) for 3rd- and higher-order Δ-Σ modulators for single-sinusoidal inputs. For single-, dual-, multiple-sinusoidal and Gaussian inputs the error is less than 2 dB for the 5th-order and reduces to less than 1 dB for 6th- and higher-order Δ-Σ modulators

Nonlinear Stability Prediction of Multibit Delta-Sigma Modulators for Sinusoidal Inputs

This paper proposes a novel algorithm that can be integrated with various design and evaluation tools, to more accurately and rapidly predict stability in multi-bit delta-sigma (Δ-Σ) modulators. Analytical expressions using the nonlinear gains from the concept of modified nonlinearity in control theory are incorporated into the mathematical model of multi-bit Δ-Σ modulators to predict the stable amplitude limits for sinusoidal input signals. The nonlinear gains lead to a set of equations which can numerically estimate the quantizer gain as a function of the input sinusoidal signal amplitude. This method is shown to accurately predict the stable amplitude limits of sinusoids for 2nd-, 3rd-, 4th-, 5th- and 6th-order 3- and 5-level mid-tread quantizer based Δ-Σ modulators. The algorithm is simple to apply and can be extended to midrise quantizers or to any number of quantizer levels. The only required input parameters for this algorithm are the number of quantizer levels and the coefficients of the noise transfer function

Accurate stability prediction of 1-bit higher-order Δ-Σ modulators for multiple-sinusoidal inputs

The present approaches on predicting stability of Delta-Sigma (Δ-Σ) modulators are mostly confined to DC inputs. This poses limitations as practical applications of Δ-Σ modulators involve a wide range of signals other than DC such as multiple sinusoidal inputs for speech modeling. In this paper, a quasi-linear model for Δ-Σ modulators with nonlinear feedback control analysis is presented that accurately predicts stability of single-loop 1-bit higher-order Δ-Σ modulators for multiple sinusoids. Theoretical values are shown to match closely with simulation results. The results of this paper would enable optimization of the design of higher-order single-loop Δ-Σ modulators with increased dynamic ranges for various applications that require multiple-sinusoidal inputs or any general input composed of a finite number of sinusoidal components

Design and characterization of a low voltage CMOS ASIC for medical instrumentation

The acquisition of biomedical signals requires analogue to digital converters of high resolution, low voltage of power and low consumption. The solution for this need is the use of new sigma delta conversion architectures such as the one tested in this Bachelor Thesis. This work covers the design of the instrumentation necessary for the operation of Application-Specific Integrated Circuit Sigma Delta Analog-to-Digital Converter (ASIC ADC) that is already manufactured and its integration into a Printed Circuit Board (PCB). It also includes the development of the necessary software that facilitates the accomplishment of the necessary tests and the analysis of the data that will allow to characterize the operation of the fabricated prototype. Finally, the results and conclusions of the project will be described. The ASIC to be tested in this Bachelor Thesis consists of a180-nm Complementary Metal-Oxide Semiconductor (CMOS) bandpass ADC developed to fulfil the specifications of a fully-integrated receiver for Magnetic Resonance Imaging (MRI). Integrating an integrated CMOS receiver into a single chip will help improve image quality by avoiding the use of many coaxial cables that are used to connect the Radio Frequency (RF) coils to the scanning hardware. The proposal made is a very simple Low-IF receiver characteristics in which a continuous time Low-IF bandpass ADC is the most efficient architecture. The circuit in continuous time replaces the classic filter only thus, an anti-alias filter would be necessary. In addition, the bandpass filter assists in the attenuation of the quantization noise in the bandwidth of interest, while at the same time the stability of the system is easily achieved due to the selected Low-IF.Ingeniería Biomédic

Contribution to the design of continuous -time Sigma - Delta Modulators based on time delay elements

The research carried out in this thesis is focused in the development of a new class of data converters for digital radio. There are two main architectures for communication receivers which perform a digital demodulation. One of them is based on analog demodulation to the base band and digitization of the I/Q components. Another option is to digitize the band pass signal at the output of the IF stage using a bandpass Sigma-Delta modulator. Bandpass Sigma- Delta modulators can be implemented with discrete-time circuits, using switched capacitors or continuous-time circuits. The main innovation introduced in this work is the use of passive transmission lines in the loop filter of a bandpass continuous-time Sigma-Delta modulator instead of the conventional solution with gm-C or LC resonators. As long as transmission lines are used as replacement of a LC resonator in RF technology, it seems compelling that transmission lines could improve bandpass continuous-time Sigma-Delta modulators. The analysis of a Sigma- Delta modulator using distributed resonators has led to a completely new family of Sigma- Delta modulators which possess properties inherited both from continuous-time and discretetime Sigma-Delta modulators. In this thesis we present the basic theory and the practical design trade-offs of this new family of Sigma-Delta modulators. Three demonstration chips have been implemented to validate the theoretical developments. The first two are a proof of concept of the application of transmission lines to build lowpass and bandpass modulators. The third chip summarizes all the contributions of the thesis. It consists of a transmission line Sigma-Delta modulator which combines subsampling techniques, a mismatch insensitive circuitry and a quadrature architecture to implement the IF to digital stage of a receiver

Analysis of Nonlinear Behaviors, Design and Control of Sigma Delta Modulators

M PhilSigma delta modulators (SDMs) have been widely applied in analogue-to-digital (A/D) conversion for many years. SDMs are becoming more and more popular in power electronic circuits because it can be viewed and applied as oversampled A/D converters with low resolution quantizers. The basic structure of an SDM under analytical investigation consists of a loop filter and a low bit quantizer connected by a negative feedback loop. Although there are numerous advantages of SDMs over other A/D converters, the application of SDMs is limited by the unboundedness of the system states and their nonlinear behaviors. It was found that complex dynamical behaviors exist in low bit SDMs, and for a bandpass SDM, the state space dynamics can be represented by elliptic fractal patterns confined within two trapezoidal regions. In all, there are three types of nonlinear behaviors, namely fixed point, limit cycle and chaotic behaviors. Related to the unboundedness issue, divergent behavior of system states is also a commonly discovered phenomenon. Consequently, how to design and control the SDM so that the system states are bounded and the unwanted nonlinear behaviors are avoided is a hot research topic worthy of investigated. In our investigation, we perform analysis on such complex behaviors and determine a control strategy to maintain the boundedness of the system states and avoid the occurrence of limit cycle behavior. For the design problem, we impose constraints based on the performance of an SDM and determine an optimal design for the SDM. The results are significantly better than the existing approaches