28,241 research outputs found
A Novel Network Coded Parallel Transmission Framework for High-Speed Ethernet
Parallel transmission, as defined in high-speed Ethernet standards, enables
to use less expensive optoelectronics and offers backwards compatibility with
legacy Optical Transport Network (OTN) infrastructure. However, optimal
parallel transmission does not scale to large networks, as it requires
computationally expensive multipath routing algorithms to minimize differential
delay, and thus the required buffer size, optimize traffic splitting ratio, and
ensure frame synchronization. In this paper, we propose a novel framework for
high-speed Ethernet, which we refer to as network coded parallel transmission,
capable of effective buffer management and frame synchronization without the
need for complex multipath algorithms in the OTN layer. We show that using
network coding can reduce the delay caused by packet reordering at the
receiver, thus requiring a smaller overall buffer size, while improving the
network throughput. We design the framework in full compliance with high-speed
Ethernet standards specified in IEEE802.3ba and present solutions for network
encoding, data structure of coded parallel transmission, buffer management and
decoding at the receiver side. The proposed network coded parallel transmission
framework is simple to implement and represents a potential major breakthrough
in the system design of future high-speed Ethernet.Comment: 6 pages, 8 figures, Submitted to Globecom201
On chip interconnects for multiprocessor turbo decoding architectures
International audienc
MorphIC: A 65-nm 738k-Synapse/mm Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning
Recent trends in the field of neural network accelerators investigate weight
quantization as a means to increase the resource- and power-efficiency of
hardware devices. As full on-chip weight storage is necessary to avoid the high
energy cost of off-chip memory accesses, memory reduction requirements for
weight storage pushed toward the use of binary weights, which were demonstrated
to have a limited accuracy reduction on many applications when
quantization-aware training techniques are used. In parallel, spiking neural
network (SNN) architectures are explored to further reduce power when
processing sparse event-based data streams, while on-chip spike-based online
learning appears as a key feature for applications constrained in power and
resources during the training phase. However, designing power- and
area-efficient spiking neural networks still requires the development of
specific techniques in order to leverage on-chip online learning on binary
weights without compromising the synapse density. In this work, we demonstrate
MorphIC, a quad-core binary-weight digital neuromorphic processor embedding a
stochastic version of the spike-driven synaptic plasticity (S-SDSP) learning
rule and a hierarchical routing fabric for large-scale chip interconnection.
The MorphIC SNN processor embeds a total of 2k leaky integrate-and-fire (LIF)
neurons and more than two million plastic synapses for an active silicon area
of 2.86mm in 65nm CMOS, achieving a high density of 738k synapses/mm.
MorphIC demonstrates an order-of-magnitude improvement in the area-accuracy
tradeoff on the MNIST classification task compared to previously-proposed SNNs,
while having no penalty in the energy-accuracy tradeoff.Comment: This document is the paper as accepted for publication in the IEEE
Transactions on Biomedical Circuits and Systems journal (2019), the
fully-edited paper is available at
https://ieeexplore.ieee.org/document/876400
Fault-Tolerant Real-Time Streaming with FEC thanks to Capillary Multi-Path Routing
Erasure resilient FEC codes in off-line packetized streaming rely on time
diversity. This requires unrestricted buffering time at the receiver. In
real-time streaming the playback buffering time must be very short. Path
diversity is an orthogonal strategy. However, the large number of long paths
increases the number of underlying links and consecutively the overall link
failure rate. This may increase the overall requirement in redundant FEC
packets for combating the link failures. We introduce the Redundancy Overall
Requirement (ROR) metric, a routing coefficient specifying the total number of
FEC packets required for compensation of all underlying link failures. We
present a capillary routing algorithm for constructing layer by layer steadily
diversifying multi-path routing patterns. By measuring the ROR coefficients of
a dozen of routing layers on hundreds of network samples, we show that the
number of required FEC packets decreases substantially when the path diversity
is increased by the capillary routing construction algorithm
The benefits of coding over routing in a randomized setting
A novel randomized network coding approach for robust, distributed transmission and compression of information in networks is presented, and its advantages over routing-based approaches is demonstrated
On the multiple unicast capacity of 3-source, 3-terminal directed acyclic networks
We consider the multiple unicast problem with three source-terminal pairs
over directed acyclic networks with unit-capacity edges. The three
pairs wish to communicate at unit-rate via network coding. The connectivity
between the pairs is quantified by means of a connectivity level
vector, such that there exist edge-disjoint paths between
and . In this work we attempt to classify networks based on the
connectivity level. It can be observed that unit-rate transmission can be
supported by routing if , for all . In this work,
we consider, connectivity level vectors such that . We present either a constructive linear network coding scheme or an
instance of a network that cannot support the desired unit-rate requirement,
for all such connectivity level vectors except the vector (and its
permutations). The benefits of our schemes extend to networks with higher and
potentially different edge capacities. Specifically, our experimental results
indicate that for networks where the different source-terminal paths have a
significant overlap, our constructive unit-rate schemes can be packed along
with routing to provide higher throughput as compared to a pure routing
approach.Comment: To appear in the IEEE/ACM Transactions on Networkin
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