Logic Programming approaches for routing fault-free and maximally-parallel Wavelength Routed Optical Networks on Chip (Application paper)

One promising trend in digital system integration consists of boosting on-chip communication performance by means of silicon photonics, thus materializing the so-called Optical Networks-on-Chip (ONoCs). Among them, wavelength routing can be used to route a signal to destination by univocally associating a routing path to the wavelength of the optical carrier. Such wavelengths should be chosen so to minimize interferences among optical channels and to avoid routing faults. As a result, physical parameter selection of such networks requires the solution of complex constrained optimization problems. In previous work, published in the proceedings of the International Conference on Computer-Aided Design, we proposed and solved the problem of computing the maximum parallelism obtainable in the communication between any two endpoints while avoiding misrouting of optical signals. The underlying technology, only quickly mentioned in that paper, is Answer Set Programming (ASP). In this work, we detail the ASP approach we used to solve such problem. Another important design issue is to select the wavelengths of optical carriers such that they are spread across the available spectrum, in order to reduce the likelihood that, due to imperfections in the manufacturing process, unintended routing faults arise. We show how to address such problem in Constraint Logic Programming on Finite Domains (CLP(FD)). This paper is under consideration for possible publication on Theory and Practice of Logic Programming.Comment: Paper presented at the 33nd International Conference on Logic Programming (ICLP 2017), Melbourne, Australia, August 28 to September 1, 2017. 16 pages, LaTeX, 5 figure

Algorithms and efficient encodings for argumentation frameworks and arithmetic problems

In this thesis we focus on the design and implementation of a particular framework of Possibilistic Defeasible Logic Programming (RP-DeLP). This framework is based on a general notion of collective (non-binary) conflict among arguments allowing to ensure direct and indirect consistency properties with respect to the strict knowledge. An output of an RP-DeLP program is a pair of sets of warranted and blocked conclusions (literals), all of them recursively based on warranted conclusions but, while warranted conclusions do not generate any conflict, blocked conclusions do. An RP-DeLP program may have multiple outputs in case of circular definitions of conflicts among arguments. We introduce two semantics, the first one where all possible outputs are computed and the second one which is a characterization of an unique output property. The computation of the outputs for both semantics relies on two main problems: the problem of finding a collective conflict among a set of arguments and the problem of finding almost valid arguments for a conclusion. Both problems are combinatorial problems, so we propose two resolution approaches: a first one based on SAT techniques and a second one based on Answer Set Programming techniques. We propose an implementation and we empirically test our algorithms. We provide an analysis on the performance of the implementation of the algorithms, and we explain the results on the resolution of some randomly generated problems. In this thesis we also focus on the resolution of some combinatorial problems. We analyze, design and implement some resolution tools for arithmetic problems, modular constraints and networking problems. We studied empirically how our approaches perform and we compared them to other solving techniques known as best proposals in the literature.Esta tesis se centra en el diseño e implementación de un framework particular para Possibilistic Defeasible Logic Programming (RP-DeLP). Este framework está basado en la noción general de conflicto colectivo entre argumentos (no binario) que permite asegurar las propiedades de consistencia directa e indirecta respecto al conocimiento estricto. Una salida de un programa RP-DeLP es una tupla de conjuntos de conclusiones (literales) garantizadas y bloqueadas, todas ellas basadas recursivamente sobre conclusiones garantizadas con la particularidad de que mientras las conclusiones garantizadas no generan ningún conflicto, las conclusiones bloqueadas sí lo hacen. Un programa RP-DeLP puede tener múltiples salidas en el caso de que existan definiciones circulares de conflictos entre los argumentos. Se introducen dos semánticas, la primera donde se computan todas las posibles salidas del programa y una segunda que nace de la caracterización de la propiedad de la salida única. El cómputo de las salidas para ambas semánticas se basa en la solución de dos problemas principales: el problema de la búsqueda de argumentos almost valid para una conclusión y la búsqueda de conflictos colectivos entre un conjunto de argumentos. Ambos problemas son problemas combinatorios y se proponen dos aproximaciones de resolución diferentes: una primera aproximación basada en técnicas SAT y otra segunda aproximación basada en técnicas de Answer Set Programming. Se propone una implementación y también se prueba empíricamente el comportamiento de los algoritmos propuestos. A través de un análisis sobre el comportamiento de la implementación se explican los resultados obtenidos. Para ello se generan problemas aleatorios donde algunas propiedades pueden ser controladas mediante la configuración de parámetros de entrada. Adicionalmente esta tesis también se centra en la resolución de otros problemas combinatorios. Se analizan e implementan herramientas para la resolución de problemas aritméticos, restricciones modulares y problemas de redes de comunicaciones. Se propone un estudio empírico de las propuestas y se comparan con las aproximaciones, conocidas como más eficientes hasta el momento, de la literatura.Aquesta tesi doctoral se centra en el disseny i implementació d'un framework particular per Possibilistic Defeasible Logic Programming (RP-DeLP). Aquest framework es basa en una noció de conflicte col·lectiu (no binària) entre arguments que permet assegurar les propietats de consistència directa i indirecta respecte del coneixement estricte. Una sortida d'un programa RP-DeLP és una parella de conjunts de conclusions garantides i bloquejades (literals), totes elles basades recursivament en conclusions prèviament garantides. La diferència radica en què mentre les conclusions garantides no generen cap conflicte, les conclusions bloquejades sí que ho fan. Un programa RP-DeLP pot tenir múltiples sortides en el cas de definicions circulars de conflictes entre arguments. S'introdueixen dues semàntiques pel sistema d'argumentació presentat. La primera d'elles pren en consideració totes les possibles sortides que poden ser obtingudes d'un programa RP-DeLP tenint en compte les diferents maneres de resoldre els conflictes circulars que poden sorgir. La segona semàntica se centra en el còmput d'una única sortida que està basada en la caracterització del que anomenem maximal ideal output. Aquesta sortida conté un nombre maximal de literals garantits, però que inclou només literals els arguments dels quals tenen els seus suports inclosos en la sortida. El comput de les sortides per ambdues semàntiques es basa en la resolució de dos problemes principals: el problema de trobar conflictes col·lectius entre un conjunt d'arguments i el problema de trobar arguments almost valid per una conclusió. Ambdós problemes són considerats problemes combinatoris i es proposen dues aproximacions per a la resolució: una primera aproximació basada en tècniques SAT i una segona basada en Answer Set Programming. Es proposa una implementació i una anàlisi empírica dels algorismes implementats. Aquests algorismes es proven sobre un conjunt de problemes generats aleatòriament mitjançant un generador que permet la configuració dels diferents paràmetres dels problemes generats. Un cop obtinguts els resultats, s'estudia quina afectació han tingut els diferents paràmetres observant el temps de resolució i la informació obtinguda. En aquesta tesi també s'estudien diferents tècniques de resolució per a altres problemes combinatoris. S'analitzen, dissenyen i implementen algunes eines de resolució per a problemes aritmètics, restriccions modulars i problemes de xarxes de comunicacions. S'ha estudiat com les aproximacions proposades es comporten en comparació amb altres tècniques proposades a la literatura considerades com les més eficients fins al moment

Proceedings of the 8th Cologne-Twente Workshop on Graphs and Combinatorial Optimization

International audienceThe Cologne-Twente Workshop (CTW) on Graphs and Combinatorial Optimization started off as a series of workshops organized bi-annually by either Köln University or Twente University. As its importance grew over time, it re-centered its geographical focus by including northern Italy (CTW04 in Menaggio, on the lake Como and CTW08 in Gargnano, on the Garda lake). This year, CTW (in its eighth edition) will be staged in France for the first time: more precisely in the heart of Paris, at the Conservatoire National d’Arts et Métiers (CNAM), between 2nd and 4th June 2009, by a mixed organizing committee with members from LIX, Ecole Polytechnique and CEDRIC, CNAM

New Data Structures and Algorithms for Logic Synthesis and Verification

The strong interaction between Electronic Design Automation (EDA) tools and Complementary Metal-Oxide Semiconductor (CMOS) technology contributed substantially to the advancement of modern digital electronics. The continuous downscaling of CMOS Field Effect Transistor (FET) dimensions enabled the semiconductor industry to fabricate digital systems with higher circuit density at reduced costs. To keep pace with technology, EDA tools are challenged to handle both digital designs with growing functionality and device models of increasing complexity. Nevertheless, whereas the downscaling of CMOS technology is requiring more complex physical design models, the logic abstraction of a transistor as a switch has not changed even with the introduction of 3D FinFET technology. As a consequence, modern EDA tools are fine tuned for CMOS technology and the underlying design methodologies are based on CMOS logic primitives, i.e., negative unate logic functions. While it is clear that CMOS logic primitives will be the ultimate building blocks for digital systems in the next ten years, no evidence is provided that CMOS logic primitives are also the optimal basis for EDA software. In EDA, the efficiency of methods and tools is measured by different metrics such as (i) the result quality, for example the performance of a digital circuit, (ii) the runtime and (iii) the memory footprint on the host computer. With the aim to optimize these metrics, the accordance to a specific logic model is no longer important. Indeed, the key to the success of an EDA technique is the expressive power of the logic primitives handling and solving the problem, which determines the capability to reach better metrics. In this thesis, we investigate new logic primitives for electronic design automation tools. We improve the efficiency of logic representation, manipulation and optimization tasks by taking advantage of majority and biconditional logic primitives. We develop synthesis tools exploiting the majority and biconditional expressiveness. Our tools show strong results as compared to state-of-the-art academic and commercial synthesis tools. Indeed, we produce the best results for several public benchmarks. On top of the enhanced synthesis power, our methods are the natural and native logic abstraction for circuit design in emerging nanotechnologies, where majority and biconditional logic are the primitive gates for physical implementation. We accelerate formal methods by (i) studying properties of logic circuits and (ii) developing new frameworks for logic reasoning engines. We prove non-trivial dualities for the property checking problem in logic circuits. Our findings enable sensible speed-ups in solving circuit satisfiability. We develop an alternative Boolean satisfiability framework based on majority functions. We prove that the general problem is still intractable but we show practical restrictions that can be solved efficiently. Finally, we focus on reversible logic where we propose a new equivalence checking approach. We exploit the invertibility of computation and the functionality of reversible gates in the formulation of the problem. This enables one order of magnitude speed up, as compared to the state-of-the-art solution. We argue that new approaches to solve EDA problems are necessary, as we have reached a point of technology where keeping pace with design goals is tougher than ever

Advances in Evolutionary Algorithms

With the recent trends towards massive data sets and significant computational power, combined with evolutionary algorithmic advances evolutionary computation is becoming much more relevant to practice. Aim of the book is to present recent improvements, innovative ideas and concepts in a part of a huge EA field

Design Space Exploration and Resource Management of Multi/Many-Core Systems

The increasing demand of processing a higher number of applications and related data on computing platforms has resulted in reliance on multi-/many-core chips as they facilitate parallel processing. However, there is a desire for these platforms to be energy-efficient and reliable, and they need to perform secure computations for the interest of the whole community. This book provides perspectives on the aforementioned aspects from leading researchers in terms of state-of-the-art contributions and upcoming trends

Towards hybrid methods for solving hard combinatorial optimization problems

Tesis doctoral leída en la Escuela Politécnica Superior de la Universidad Autónoma de Madrid el 4 de septiembre de 200

Proceedings of the 3rd International Conference on Models and Technologies for Intelligent Transportation Systems 2013

Challenges arising from an increasing traffic demand, limited resource availability and growing quality expectations of the customers can only be met successfully, if each transport mode is regarded as an intelligent transportation system itself, but also as part of one intelligent transportation system with “intelligent” intramodal and intermodal interfaces. This topic is well reflected in the Third International Conference on “Models and Technologies for Intelligent Transportation Systems” which took place in Dresden 2013 (previous editions: Rome 2009, Leuven 2011). With its variety of traffic management problems that can be solved using similar methods and technologies, but with application specific models, objective functions and constraints the conference stands for an intensive exchange between theory and practice and the presentation of case studies for all transport modes and gives a discussion forum for control engineers, computer scientists, mathematicians and other researchers and practitioners. The present book comprises fifty short papers accepted for presentation at the Third Edition of the conference. All submissions have undergone intensive reviews by the organisers of the special sessions, the members of the scientific and technical advisory committees and further external experts in the field. Like the conference itself the proceedings are structured in twelve streams: the more model-oriented streams of Road-Bound Public Transport Management, Modelling and Control of Urban Traffic Flow, Railway Traffic Management in four different sessions, Air Traffic Management, Water Traffic and Traffic and Transit Assignment, as well as the technology-oriented streams of Floating Car Data, Localisation Technologies for Intelligent Transportation Systems and Image Processing in Transportation. With this broad range of topics this book will be of interest to a number of groups: ITS experts in research and industry, students of transport and control engineering, operations research and computer science. The case studies will also be of interest for transport operators and members of traffic administration