Stability analysis of switched dc-dc boost converters for integrated circuits

Boost converters are very important circuits for modern devices, especially battery- operated integrated circuits. This type of converter allows for small voltages, such as those provided by a battery, to be converted into larger voltage more suitable for driving integrated circuits. Two regions of operation are explored known as Continuous Conduction Mode and Discontinuous Conduction Mode. Each region is analyzed in terms of DC and small-signal performance. Control issues with each are compared and various error amplifier architectures explored. A method to optimize these amplifier architectures is also explored by means of Genetic Algorithms and Particle Swarm Optimization. Finally, stability measurement techniques for boost converters are explored and compared in order to gauge the viability of each method. The Middlebrook Method for measuring stability and cross-correlation are explored here

Dynamic modeling of pwm and single-switch single-stage power factor correction converters

The concept of averaging has been used extensively in the modeling of power electronic circuits to overcome their inherent time-variant nature. Among various methods, the PWM switch modeling approach is most widely accepted in the study of closed-loop stability and transient response because of its accuracy and simplicity. However, a non-ideal PWM switch model considering conduction losses is not available except for converters operating in continuous conduction mode (CCM) and under small ripple conditions. Modeling of conductor losses under large ripple conditions has not been reported in the open literature, especially when the converter operates in discontinuous conduction mode (DCM). In this dissertation, new models are developed to include conduction losses in the non-ideal PWM switch model under CCM and DCM conditions. The developed model is verified through two converter examples and the effect of conduction losses on the steady state and dynamic responses of the converter is also studied. Another major constraint of the PWM switch modeling approach is that it heavily relies on finding the three-terminal PWM switch. This requirement severely limits its application in modeling single-switch single-stage power factor correction (PFC) converters, where more complex topological structures and switching actions are often encountered. In this work, we developed a new modeling approach which extends the PWM switch concept by identifying the charging and discharging voltages applied to the inductors. The new method can be easily applied to derive large-signal models for a large group of PFC converters and the procedure is elaborated through a specific example. Finally, analytical results regarding harmonic contents and power factors of various PWM converters in PFC applications are also presented here

Multi-harmonic Modeling of Low-power PWM DC-DC Converter

Modeling and simulation of switched-mode Pulse Width Modulated (PWM) DC-DC converters form an essential ingredient in the analysis and design process of integrated circuits. In this research work, we present a novel large-signal modeling technique for low-power PWM DC-DC converters. The proposed model captures not only the time-averaged response within each moving switching cycle but also high-order harmonics of an arbitrary degree, hence modeling both the average component and ripple very accurately. The proposed model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. By continuously monitoring state variables, our model seamlessly transitions between the continuous conduction mode (CCM) and discontinuous conduction mode (DCM), which often occurs in low-power applications. The nonlinearities of devices are also considered and efficiently evaluated resulting in a significant improvement in model accuracy. With a system decoupling technique, the DC response of the model is decoupled from higher-order harmonics, providing additional simulation speedups. For a number of converter designs, the proposed model obtains up to 10x runtime speedups over transistor-level transient simulation with a maximum output voltage error less than 4%

Space platform power system hardware testbed

The scope of the work on the NASA Space Platform includes the design of a multi-module, multi-phase boost regulator, and a voltage-fed, push-pull autotransformer converter for the battery discharger. A buck converter was designed for the charge regulator. Also included is the associated mode control electronics for the charger and discharger, as well as continued development of a comprehensive modeling and simulation tool for the system. The design of the multi-module boost converter is discussed for use as a battery discharger. An alternative battery discharger design is discussed using a voltage-fed, push-pull autotransformer converter. The design of the charge regulator is explained using a simple buck converter. The design of the mode controller and effects of locating the bus filter capacitor bank 20 feet away from the power ORU are discussed. A brief discussion of some alternative topologies for battery charging and discharging is included. The power system modeling is described

Grid-tie Quasi Z-Source Inverter-Based Static Synchronous Compensator

This research work proposes intensive study and mathematical modelling analysis of transformer-less quasi Z-source inverter (qZSI) based static synchronous compensator (STATCOM) system. In this work, a single-phase qZSI is acted as a STATCOM system to compensate the grid reactive power at the point of coupling under different loading conditions. A new controller-based lead compensator is developed to achieve fast DC-link voltage balance across each qZS network. Simulation studies are conducted to evaluate the controller’s performance

Modelling of a Buck converter with adaptive modulation and design of related driver stage

This thesis concerns the modelling of a buck converter with peak current mode control, and adaptive PWM/PFM (constant Ton) and provides a small signal model, derived from steady-state averaging, for all the operative regions of the converter, and used for stability analysis and parametric optimization. Eventually the design of a driver stage is proposed, with segmentation, dead time control and zero cross detection as main functionalities to improve efficienc