Geometrically-constrained, parasitic-aware synthesis of analog ICs

In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as much as possible. More specifically, spins between electrical and physical synthesis should be reduced for this is a very time-consuming task: if circuit performance including layout-induced degradations proves unacceptable, a re-design cycle must be entered, and electrical, physical, or both synthesis processes, would have to be repeated. It is also worth noting that if geometric optimization (e.g., area minimization) is undertaken after electrical synthesis, it may add up as another source of unexpected degradation of the circuit performance due to the impact of the geometric variables (e.g., transistor folds) on the device and the routing parasitic values. This awkward scenario is caused by the complete separation of said electrical and physical synthesis, a design practice commonly followed so far. Parasitic-aware synthesis, consisting in including parasitic estimates to the circuit netlist directly during electrical synthesis, has been proposed as solution. While most of the reported contributions either tackle parasitic-aware synthesis without paying special attention to geometric optimization or approach both issues only partially, this paper addresses the problem in a unified way. In what has been called layout-aware electrical synthesis, a simulation-based optimization algorithm explores the design space with geometric variables constrained to meet certain user-defined goals, which provides reliable estimates of layout-induced parasitics at each iteration, and, thereby, accurate evaluation of the circuit ultimate performance. This technique, demonstrated here through several design examples, requires knowing layout details beforehand; to facilitate this, procedural layout generation is used as physical synthesis approach due to its rapidness and ability to capture analog layout know-how.Ministerio de Educación y Ciencia TEC2004-0175

On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis

Accelerating the synthesis of increasingly complex analog integrated circuits is key to bridge the widening gap between what we can integrate and what we can design while meeting ever-tightening time-to-market constraints. It is a well-known fact in the semiconductor industry that such goal can only be attained by means of adequate CAD methodologies, techniques, and accompanying tools. This is particularly important in analog physical synthesis (a.k.a. layout generation), where large sensitivities of the circuit performances to the many subtle details of layout implementation (device matching, loading and coupling effects, reliability, and area features are of utmost importance to analog designers), render complete automation a truly challenging task. To approach the problem, two directions have been traditionally considered, knowledge-based and optimization-based, both with their own pros and cons. Besides, recently reported solutions oriented to speed up the overall design flow by means of reuse-based practices or by cutting off time-consuming, error-prone spins between electrical and layout synthesis (a technique known as layout-aware synthesis), rely on a outstandingly rapid yet efficient layout generation method. This paper analyses the suitability of procedural layout generation based on templates (a knowledge-based approach) by examining the requirements that both layout reuse and layout-aware solutions impose, and how layout templates face them. The ability to capture the know-how of experienced layout designers and the turnaround times for layout instancing are considered main comparative aspects in relation to other layout generation approaches. A discussion on the benefit-cost trade-off of using layout templates is also included. In addition to this analysis, the paper delves deeper into systematic techniques to develop fully reusable layout templates for analog circuits, either for a change of the circuit sizing (i.e., layout retargeting) or a change of the fabrication process (i.e., layout migration). Several examples implemented with the Cadence's Virtuoso tool suite are provided as demonstration of the paper's contributions.Ministerio de Educación y Ciencia TEC2004-0175

Conceptual Design of a New Large Superconducting Toroid for IAXO, the New International AXion Observatory

The International AXion Observatory (IAXO) will incorporate a new generation detector for axions, a hypothetical particle, which was postulated to solve one of the puzzles arising in the standard model of particle physics, namely the strong CP problem. The new IAXO experiment is aiming at achieving a sensitivity to the coupling between axions and photons of one order of magnitude beyond the limits of the current state-of-the-art detector, represented by the CERN Axion Solar Telescope (CAST). The IAXO detector relies on a high-magnetic field distributed over a very large volume to convert solar axions into x-ray photons. Utilizing the designs of the ATLAS barrel and end-cap toroids, a large superconducting toroidal magnet is currently being designed at CERN to provide the required magnetic field. The new toroid will be built up from eight, one meter wide and 20 m long, racetrack coils. The toroid is sized about 4 m in diameter and 22 m in length. It is designed to realize a peak magnetic field of 5.4 T with a stored energy of 500 MJ. The magnetic field optimization process to arrive at maximum detector yield is described. In addition, force and stress calculations are performed to select materials and determine their structure and sizing. Conductor dimensionality, quench protection and the cryogenic design are dealt with as well.Comment: 5 pages, 5 figures. To be published in IEEE Trans. Appl. Supercond. 23 (ASC 2012 conference special issue

Spray Formation from Spark-Eroded and Laser-Drilled Injectors for DISI Engines with Gasoline and Alcohol Fuels

Copyright © 2014 SAE International.One of the latest advancements in injector technology is laser drilling of the nozzle holes. In this context, the spray formation and atomisation characteristics of gasoline, ethanol and 1-butanol were investigated for a 7-hole spark eroded (SE) injector and its ‘direct replacement’ Laser-drilled (LD) injector using optical techniques. In the first step of the optical investigation, high-speed spray imaging was performed in a quiescent injection chamber with global illumination using diffused Laser light. The images were statistically analyzed to obtain spray penetration, spray tip velocity and spray ‘cone’ angles. Furthermore, droplet sizing was undertaken using Phase Doppler Anemometry (PDA). A single spray plume was isolated for this analysis and measurements were obtained across the plume at a fixed distance from the nozzle exit. The droplet measurements were grouped into bins and maps were created showing droplet sizes and velocities against time and position during and post injection. All tests were performed at 120 bar fuel pressure, two injection chamber ‘back’ pressures (0.5 bar and 1 bar) and two injector temperatures (20 °C and 80 °C), to examine effects relevant to typical engine operating conditions with early intake stroke injection strategies, including fuel flash boiling

Robust particle outline extraction and its application to digital on-line holography

Peer reviewedPostprin

Automatic synthesis of analog layout : a survey

A review of recent research in the automatic synthesis of physical geometry for analog integrated circuits is presented. On introduction, an explanation of the difficulties involved in analog layout as opposed to digital layout is covered. Review of the literature then follows. Emphasis is placed on the exposition of general methods for addressing problems specific to analog layout, with the details of specific systems only being given when they surve to illustrate these methods well. The conclusion discusses problems remaining and offers a prediction as to how technology will evolve to solve them. It is argued that although progress has been and will continue to be made in the automation of analog IC layout, due to fundamental differences in the nature of analog IC design as opposed to digital design, it should not be expected that the level of automation of the former will reach that of the latter any time soon

A logistics management system for a biomass-to-energy production plant storage park

This work was partially supported by the following entities: (L.J.N.) proMetheus-Research Unit on Energy, Materials and Environment for Sustainability-UIDP/05975/2020, funded by national funds through FCT-Fundacao para a Ciencia e Tecnologia; (R.G.) UNIDEMI-Research & Development Unit for Mechanical and Industrial Engineering-UIDB/00667/2020, funded by national funds through FCT-Fundacao para a Ciencia e Tecnologia; and (J.C.M.) GOVCOPP-Research Unit on Governance, Competitiveness and Public Policies-UID/CPO/04058/2019, funded by national funds through FCT-Fundacao para a Ciencia e Tecnologia.The biomass industry is growing due to the current search for greener and more sustainable alternatives to fossil energy sources. However, this industry, due to its singularity, presents several challenges and disadvantages related to the transportation of raw materials, with the large volumes that are usually involved. This project aimed to address this internal logistics situation in torrefied biomass pellets production with two different biomass storage parks, located in Portugal. The main park receives raw material coming directly from the source and stores it in large amounts as a backup and strategic storage park. The second park, with smaller dimensions, precedes the production unit and must be stocked daily. Therefore, a fleet of transport units with self-unloading cranes is required to help to unload the biomass at the main park and transport the raw material from this park to the one preceding the production unit. Thus, the main goal was to determine the dimensions of the fleet used in internal transportation operations to minimize the idle time of the transport units using a methodology already in use in the mining and quarrying industry. This methodology was analyzed and adapted to the situation presented here. The implementation of this study allows the elimination of unnecessary costs in an industry where the profit margins are low.publishersversionpublishe

Locally optimal Delaunay-refinement and optimisation-based mesh generation

The field of mesh generation concerns the development of efficient algorithmic techniques to construct high-quality tessellations of complex geometrical objects. In this thesis, I investigate the problem of unstructured simplicial mesh generation for problems in two- and three-dimensional spaces, in which meshes consist of collections of triangular and tetrahedral elements. I focus on the development of efficient algorithms and computer programs to produce high-quality meshes for planar, surface and volumetric objects of arbitrary complexity. I develop and implement a number of new algorithms for mesh construction based on the Frontal-Delaunay paradigm - a hybridisation of conventional Delaunay-refinement and advancing-front techniques. I show that the proposed algorithms are a significant improvement on existing approaches, typically outperforming the Delaunay-refinement technique in terms of both element shape- and size-quality, while offering significantly improved theoretical robustness compared to advancing-front techniques. I verify experimentally that the proposed methods achieve the same element shape- and size-guarantees that are typically associated with conventional Delaunay-refinement techniques. In addition to mesh construction, methods for mesh improvement are also investigated. I develop and implement a family of techniques designed to improve the element shape quality of existing simplicial meshes, using a combination of optimisation-based vertex smoothing, local topological transformation and vertex insertion techniques. These operations are interleaved according to a new priority-based schedule, and I show that the resulting algorithms are competitive with existing state-of-the-art approaches in terms of mesh quality, while offering significant improvements in computational efficiency. Optimised C++ implementations for the proposed mesh generation and mesh optimisation algorithms are provided in the JIGSAW and JITTERBUG software libraries

Structural Sizing Methodology for the Tendon-Actuated Lightweight In-Space MANipulator (TALISMAN) System

The Tendon-Actuated Lightweight In-Space MANipulator (TALISMAN) is a versatile long-reach robotic manipulator that is currently being tested at NASA Langley Research Center. TALISMAN is designed to be highly mass-efficient and multi-mission capable, with applications including asteroid retrieval and manipulation, in-space servicing, and astronaut and payload positioning. The manipulator uses a modular, periodic, tension-compression design that lends itself well to analytical modeling. Given the versatility of application for TALISMAN, a structural sizing methodology was developed that could rapidly assess mass and configuration sensitivities for any specified operating work space, applied loads and mission requirements. This methodology allows the systematic sizing of the key structural members of TALISMAN, which include the truss arm links, the spreaders and the tension elements. This paper summarizes the detailed analytical derivations and methodology that support the structural sizing approach and provides results from some recent TALISMAN designs developed for current and proposed mission architectures

Price-and-verify: a new algorithm for recursive circle packing using Dantzig–Wolfe decomposition

This is the author accepted manuscript. The final version is available from Springer via the DOI in this record Packing rings into a minimum number of rectangles is an optimization problem which appears naturally in the logistics operations of the tube industry. It encompasses two major difficulties, namely the positioning of rings in rectangles and the recursive packing of rings into other rings. This problem is known as the Recursive Circle Packing Problem (RCPP). We present the first dedicated method for solving RCPP that provides strong dual bounds based on an exact Dantzig–Wolfe reformulation of a nonconvex mixed-integer nonlinear programming formulation. The key idea of this reformulation is to break symmetry on each recursion level by enumerating one-level packings, i.e., packings of circles into other circles, and by dynamically generating packings of circles into rectangles. We use column generation techniques to design a “price-and-verify” algorithm that solves this reformulation to global optimality. Extensive computational experiments on a large test set show that our method not only computes tight dual bounds, but often produces primal solutions better than those computed by heuristics from the literature.Federal Ministry of Education and Researc