23,261 research outputs found
Synthesis and Optimization of Reversible Circuits - A Survey
Reversible logic circuits have been historically motivated by theoretical
research in low-power electronics as well as practical improvement of
bit-manipulation transforms in cryptography and computer graphics. Recently,
reversible circuits have attracted interest as components of quantum
algorithms, as well as in photonic and nano-computing technologies where some
switching devices offer no signal gain. Research in generating reversible logic
distinguishes between circuit synthesis, post-synthesis optimization, and
technology mapping. In this survey, we review algorithmic paradigms ---
search-based, cycle-based, transformation-based, and BDD-based --- as well as
specific algorithms for reversible synthesis, both exact and heuristic. We
conclude the survey by outlining key open challenges in synthesis of reversible
and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table
A Library-Based Synthesis Methodology for Reversible Logic
In this paper, a library-based synthesis methodology for reversible circuits
is proposed where a reversible specification is considered as a permutation
comprising a set of cycles. To this end, a pre-synthesis optimization step is
introduced to construct a reversible specification from an irreversible
function. In addition, a cycle-based representation model is presented to be
used as an intermediate format in the proposed synthesis methodology. The
selected intermediate format serves as a focal point for all potential
representation models. In order to synthesize a given function, a library
containing seven building blocks is used where each building block is a cycle
of length less than 6. To synthesize large cycles, we also propose a
decomposition algorithm which produces all possible minimal and inequivalent
factorizations for a given cycle of length greater than 5. All decompositions
contain the maximum number of disjoint cycles. The generated decompositions are
used in conjunction with a novel cycle assignment algorithm which is proposed
based on the graph matching problem to select the best possible cycle pairs.
Then, each pair is synthesized by using the available components of the
library. The decomposition algorithm together with the cycle assignment method
are considered as a binding method which selects a building block from the
library for each cycle. Finally, a post-synthesis optimization step is
introduced to optimize the synthesis results in terms of different costs.Comment: 24 pages, 8 figures, Microelectronics Journal, Elsevie
Optimization of Circuits for IBM's five-qubit Quantum Computers
IBM has made several quantum computers available to researchers around the
world via cloud services. Two architectures with five qubits, one with 16, and
one with 20 qubits are available to run experiments. The IBM architectures
implement gates from the Clifford+T gate library. However, each architecture
only implements a subset of the possible CNOT gates. In this paper, we show how
Clifford+T circuits can efficiently be mapped into the two IBM quantum
computers with 5 qubits. We further present an algorithm and a set of circuit
identities that may be used to optimize the Clifford+T circuits in terms of
gate count and number of levels. It is further shown that the optimized
circuits can considerably reduce the gate count and number of levels and thus
produce results with better fidelity
Depth-Optimized Reversible Circuit Synthesis
In this paper, simultaneous reduction of circuit depth and synthesis cost of
reversible circuits in quantum technologies with limited interaction is
addressed. We developed a cycle-based synthesis algorithm which uses negative
controls and limited distance between gate lines. To improve circuit depth, a
new parallel structure is introduced in which before synthesis a set of
disjoint cycles are extracted from the input specification and distributed into
some subsets. The cycles of each subset are synthesized independently on
different sets of ancillae. Accordingly, each disjoint set can be synthesized
by different synthesis methods. Our analysis shows that the best worst-case
synthesis cost of reversible circuits in the linear nearest neighbor
architecture is improved by the proposed approach. Our experimental results
reveal the effectiveness of the proposed approach to reduce cost and circuit
depth for several benchmarks.Comment: 13 pages, 6 figures, 5 tables; Quantum Information Processing (QINP)
journal, 201
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