1,052 research outputs found
Construction and commissioning of a technological prototype of a high-granularity semi-digital hadronic calorimeter
A large prototype of 1.3m3 was designed and built as a demonstrator of the
semi-digital hadronic calorimeter (SDHCAL) concept proposed for the future ILC
experiments. The prototype is a sampling hadronic calorimeter of 48 units. Each
unit is built of an active layer made of 1m2 Glass Resistive Plate
Chamber(GRPC) detector placed inside a cassette whose walls are made of
stainless steel. The cassette contains also the electronics used to read out
the GRPC detector. The lateral granularity of the active layer is provided by
the electronics pick-up pads of 1cm2 each. The cassettes are inserted into a
self-supporting mechanical structure built also of stainless steel plates
which, with the cassettes walls, play the role of the absorber. The prototype
was designed to be very compact and important efforts were made to minimize the
number of services cables to optimize the efficiency of the Particle Flow
Algorithm techniques to be used in the future ILC experiments. The different
components of the SDHCAL prototype were studied individually and strict
criteria were applied for the final selection of these components. Basic
calibration procedures were performed after the prototype assembling. The
prototype is the first of a series of new-generation detectors equipped with a
power-pulsing mode intended to reduce the power consumption of this highly
granular detector. A dedicated acquisition system was developed to deal with
the output of more than 440000 electronics channels in both trigger and
triggerless modes. After its completion in 2011, the prototype was commissioned
using cosmic rays and particles beams at CERN.Comment: 49 pages, 41 figure
FLEXIBLE LOW-COST HW/SW ARCHITECTURES FOR TEST, CALIBRATION AND CONDITIONING OF MEMS SENSOR SYSTEMS
During the last years smart sensors based on Micro-Electro-Mechanical systems (MEMS) are widely spreading over various fields as automotive, biomedical, optical and consumer, and nowadays they represent the outstanding state of the art.
The reasons of their diffusion is related to the capability to measure physical and chemical information using miniaturized components.
The developing of this kind of architectures, due to the heterogeneities of their components, requires a very complex design flow, due to the utilization of both mechanical parts typical of the MEMS sensor and electronic components for the interfacing and the conditioning.
In these kind of systems testing activities gain a considerable importance, and they concern various phases of the life-cycle of a MEMS based system. Indeed, since the design phase of the sensor, the validation of the design by the extraction of characteristic parameters is important, because they are necessary to design the sensor interface circuit. Moreover, this kind of architecture requires techniques for the calibration and the evaluation of the whole system in addition to the traditional methods for the testing of the control circuitry.
The first part of this research work addresses the testing optimization by the developing of different hardware/software architecture for the different testing stages of the developing flow of a MEMS based system. A flexible and low-cost platform for the characterization and the prototyping of MEMS sensors has been developed in order to provide an environment that allows also to support the design of the sensor interface. To reduce the reengineering time requested during the verification testing a universal client-server architecture has been designed to provide a unique framework to test different kind of devices, using different development environment and programming languages. Because the use of ATE during the engineering phase of the calibration algorithm is expensive in terms of ATE’s occupation time, since it requires the interruption of the production process, a flexible and easily adaptable low-cost hardware/software architecture for the calibration and the evaluation of the performance has been developed in order to allow the developing of the calibration algorithm in a user-friendly environment that permits also to realize a small and medium volume production.
The second part of the research work deals with a topic that is becoming ever more important in the field of applications for MEMS sensors, and concerns the capability to combine information extracted from different typologies of sensors (typically accelerometers, gyroscopes and magnetometers) to obtain more complex information. In this context two different algorithm for the sensor fusion has been analyzed and developed: the first one is a fully software algorithm that has been used as a means to estimate how much the errors in MEMS sensor data affect the estimation of the parameter computed using a sensor fusion algorithm; the second one, instead, is a sensor fusion algorithm based on a simplified Kalman filter. Starting from this algorithm, a bit-true model in Mathworks Simulink(TM) has been created as a system study for the implementation of the algorithm on chip
Technical Design Report for PANDA Electromagnetic Calorimeter (EMC)
This document presents the technical layout and the envisaged performance of the Electromagnetic Calorimeter (EMC) for the
PANDA target spectrometer. The EMC has been designed to meet the physics goals of the PANDA experiment. The performance figures are based on extensive prototype tests and radiation hardness studies. The document shows that the EMC is ready for construction up to the front-end electronics interface
Technical Design Report for the PANDA Micro Vertex Detector
This document illustrates the technical layout and the expected performance of the Micro Vertex Detector (MVD) of the PANDA experiment. The MVD will detect charged particles as close as possible to the interaction zone. Design criteria and the optimisation process as well as the technical solutions chosen are discussed and the results of this process are subjected to extensive Monte Carlo physics studies. The route towards realisation of the detector is
outlined
Low-power CMOS digital-pixel Imagers for high-speed uncooled PbSe IR applications
This PhD dissertation describes the research and development of a new low-cost medium wavelength infrared MWIR monolithic imager technology
for high-speed uncooled industrial applications. It takes the baton on the latest technological advances in the field of vapour phase deposition (VPD)
PbSe-based medium wavelength IR (MWIR) detection accomplished by the industrial partner NIT S.L., adding fundamental knowledge on the investigation of novel VLSI analog and mixed-signal design techniques at circuit and system levels for the development of the readout integrated device attached to the detector.
The work supports on the hypothesis that, by the use of the preceding design techniques, current standard inexpensive CMOS technologies fulfill all
operational requirements of the VPD PbSe detector in terms of connectivity, reliability, functionality and scalability to integrate the device. The resulting monolithic PbSe-CMOS camera must consume very low power, operate at kHz frequencies, exhibit good uniformity and fit the CMOS read-out active pixels in the compact pitch of the focal plane, all while addressing the particular characteristics of the MWIR detector: high dark-to-signal ratios, large input parasitic capacitance values and remarkable mismatching in PbSe integration.
In order to achieve these demands, this thesis proposes null inter-pixel crosstalk vision sensor architectures based on a digital-only focal plane array (FPA) of configurable pixel sensors. Each digital pixel sensor (DPS) cell is equipped with fast communication modules, self-biasing, offset cancellation, analog-to-digital converter (ADC) and fixed pattern noise (FPN) correction. In-pixel power consumption is minimized by the use of comprehensive MOSFET subthreshold operation.
The main aim is to potentiate the integration of PbSe-based infra-red (IR)-image sensing technologies so as to widen its use, not only in distinct scenarios, but also at different stages of PbSe-CMOS integration maturity. For this purpose, we posit to investigate a comprehensive set of functional blocks distributed in two parallel approaches:
• Frame-based “Smart” MWIR imaging based on new DPS circuit topologies with gain and offset FPN correction capabilities. This research
line exploits the detector pitch to offer fully-digital programmability at pixel level and complete functionality with input parasitic capacitance compensation and internal frame memory.
• Frame-free “Compact”-pitch MWIR vision based on a novel DPS lossless analog integrator and configurable temporal difference, combined with asynchronous communication protocols inside the focal plane. This strategy is conceived to allow extensive pitch compaction and readout speed increase by the suppression of in-pixel digital filtering, and the use of dynamic bandwidth allocation in each pixel of the FPA.
In order make the electrical validation of first prototypes independent of the expensive PbSe deposition processes at wafer level, investigation is extended as well to the development of affordable sensor emulation strategies and integrated test platforms specifically oriented to image read-out integrated circuits. DPS cells, imagers and test chips have been fabricated and characterized in standard 0.15ÎĽm 1P6M, 0.35ÎĽm 2P4M and 2.5ÎĽm 2P1M CMOS technologies, all as part of research projects with industrial partnership.
The research has led to the first high-speed uncooled frame-based IR quantum imager monolithically fabricated in a standard VLSI CMOS technology, and has given rise to the Tachyon series [1], a new line of commercial IR cameras used in real-time industrial, environmental and transportation control systems. The frame-free architectures investigated in this work represent a firm step forward to push further pixel pitch and system bandwidth up to the limits imposed by the evolving PbSe detector in future generations of the device.La present tesi doctoral descriu la recerca i el desenvolupament d'una nova tecnologia monolĂtica d'imatgeria infraroja de longitud d'ona mitja (MWIR), no refrigerada i de baix cost, per a usos industrials d'alta velocitat. El treball pren el relleu dels Ăşltims avenços assolits pel soci industrial NIT S.L. en el camp dels detectors MWIR de PbSe depositats en fase vapor (VPD), afegint-hi coneixement fonamental en la investigaciĂł de noves tècniques de disseny de circuits VLSI analògics i mixtes pel desenvolupament del dispositiu integrat de lectura unit al detector pixelat. Es parteix de la hipòtesi que, mitjançant l'Ăşs de les esmentades tècniques de disseny, les tecnologies CMOS estĂ ndard satisfan tots els requeriments operacionals del detector VPD PbSe respecte a connectivitat, fiabilitat, funcionalitat i escalabilitat per integrar de forma econòmica el dispositiu. La cĂ mera PbSe-CMOS resultant ha de consumir molt baixa potència, operar a freqüències de kHz, exhibir bona uniformitat, i encabir els pĂxels actius CMOS de lectura en el pitch compacte del pla focal de la imatge, tot atenent a les particulars caracterĂstiques del detector: altes relacions de corrent d'obscuritat a senyal, elevats valors de capacitat parĂ sita a l'entrada i dispersions importants en el procĂ©s de fabricaciĂł. Amb la finalitat de complir amb els requisits previs, es proposen arquitectures de sensors de visiĂł de molt baix acoblament interpĂxel basades en l'Ăşs d'una matriu de pla focal (FPA) de pĂxels actius exclusivament digitals. Cada pĂxel sensor digital (DPS) estĂ equipat amb mòduls de comunicaciĂł d'alta velocitat, autopolaritzaciĂł, cancel·laciĂł de l'offset, conversiĂł analògica-digital (ADC) i correcciĂł del soroll de patrĂł fixe (FPN). El consum en cada cel·la es minimitza fent un Ăşs exhaustiu del MOSFET operant en subllindar. L'objectiu Ăşltim Ă©s potenciar la integraciĂł de les tecnologies de sensat d'imatge infraroja (IR) basades en PbSe per expandir-ne el seu Ăşs, no nomĂ©s a diferents escenaris, sinĂł tambĂ© en diferents estadis de maduresa de la integraciĂł PbSe-CMOS. En aquest sentit, es proposa investigar un conjunt complet de blocs funcionals distribuĂŻts en dos enfocs paral·lels: - Dispositius d'imatgeria MWIR "Smart" basats en frames utilitzant noves topologies de circuit DPS amb correcciĂł de l'FPN en guany i offset. Aquesta lĂnia de recerca exprimeix el pitch del detector per oferir una programabilitat completament digital a nivell de pĂxel i plena funcionalitat amb compensaciĂł de la capacitat parĂ sita d'entrada i memòria interna de fotograma. - Dispositius de visiĂł MWIR "Compact"-pitch "frame-free" en base a un novedĂłs esquema d'integraciĂł analògica en el DPS i diferenciaciĂł temporal configurable, combinats amb protocols de comunicaciĂł asĂncrons dins del pla focal. Aquesta estratègia es concep per permetre una alta compactaciĂł del pitch i un increment de la velocitat de lectura, mitjançant la supressiĂł del filtrat digital intern i l'assignaciĂł dinĂ mica de l'ample de banda a cada pĂxel de l'FPA. Per tal d'independitzar la validaciĂł elèctrica dels primers prototips respecte a costosos processos de deposiciĂł del PbSe sensor a nivell d'oblia, la recerca s'amplia tambĂ© al desenvolupament de noves estratègies d'emulaciĂł del detector d'IR i plataformes de test integrades especialment orientades a circuits integrats de lectura d'imatge. Cel·les DPS, dispositius d'imatge i xips de test s'han fabricat i caracteritzat, respectivament, en tecnologies CMOS estĂ ndard 0.15 micres 1P6M, 0.35 micres 2P4M i 2.5 micres 2P1M, tots dins el marc de projectes de recerca amb socis industrials. Aquest treball ha conduĂŻt a la fabricaciĂł del primer dispositiu quĂ ntic d'imatgeria IR d'alta velocitat, no refrigerat, basat en frames, i monolĂticament fabricat en tecnologia VLSI CMOS estĂ ndard, i ha donat lloc a Tachyon, una nova lĂnia de cĂ meres IR comercials emprades en sistemes de control industrial, mediambiental i de transport en temps real.Postprint (published version
Characterization of the Imaging Performance of the Simultaneously Counting and Integrating X-ray Detector CIX
The CIX detector is a direct converting hybrid pixel detector designed for medical X-ray imaging applications. Its defining feature is the simultaneous operation of a photon counter as well as an integrator in every pixel cell. This novel approach offers a dynamic range of more than five orders of magnitude, as well as the ability to directly obtain the average photon energy from the measured data. Several CIX 0.2 ASICs have been successfully connected to CdTe, CdZnTe and Si sensors. These detector modules were tested with respect to the imaging performance of the simultaneously counting and integrating concept under X-ray irradiation. Apart from a characterization of the intrinsic benefits of the CIX concept, the sensor performance was also investigated. Here, the two parallel signal processing concepts offer valuable insights into material related effects like polarization and temporal response. The impact of interpixel coupling effects like charge-sharing, Compton scattering and X-ray uorescence was evaluated through simulations and measurements
Horizon definition study summary - Horizon definition study
Earth infrared horizon definition for space guidance, navigation, control, and pointing systems - feasibility stud
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