Simulation in der Computer-Chip-Produktion – Möglichkeiten und Grenzen

Der Beitrag führt zuerst in die Halbleiterfertigung und die damit verbundene innerbetriebliche Logistik, dabei vor allem das Transport- und Handhabungssystem, ein. Bei der Planung und Steuerung solcher Anlagen stellen sich sehr anspruchsvolle Aufgaben, die nur mithilfe der Simulation zu lösen sind. Hierzu wird dargestellt, wie sich der Simulationseinsatz in der Halbleiterproduktion und -logistik gestaltet. Mit der Komplexität der Prozesse und Systeme wächst natürlich auch die Komplexität der eingesetzten Simulationsmodelle – auf die Frage nach einem angemessenen Abstraktionsgrad gibt es bislang jedoch keine befriedigende Antwort. Der Beitrag stellt dazu Lösungsansätze vor und zeigt, worauf künftige Forschungsarbeiten fokussieren sollten

Benchmarking foreign electronics technologies

This report has been drafted in response to a request from the Japanese Technology Evaluation Center`s (JTEC) Panel on Benchmarking Select Technologies. Since April 1991, the Competitive Semiconductor Manufacturing (CSM) Program at the University of California at Berkeley has been engaged in a detailed study of quality, productivity, and competitiveness in semiconductor manufacturing worldwide. The program is a joint activity of the College of Engineering, the Haas School of Business, and the Berkeley Roundtable on the International Economy, under sponsorship of the Alfred P. Sloan Foundation, and with the cooperation of semiconductor producers from Asia, Europe and the United States. Professors David A. Hodges and Robert C. Leachman are the project`s Co-Directors. The present report for JTEC is primarily based on data and analysis drawn from that continuing program. The CSM program is being conducted by faculty, graduate students and research staff from UC Berkeley`s Schools of Engineering and Business, and Department of Economics. Many of the participating firms are represented on the program`s Industry Advisory Board. The Board played an important role in defining the research agenda. A pilot study was conducted in 1991 with the cooperation of three semiconductor plants. The research plan and survey documents were thereby refined. The main phase of the CSM benchmarking study began in mid-1992 and will continue at least through 1997. reports are presented on the manufacture of integrated circuits; data storage; wireless technology; human-machine interfaces; and optoelectronics. Selected papers are indexed separately for inclusion in the Energy Science and Technology Database

Photonic Integrated Circuit (PIC) Device Structures: Background, Fabrication Ecosystem, Relevance to Space Systems Applications, and Discussion of Related Radiation Effects

Electronic integrated circuits are considered one of the most significant technological advances of the 20th century, with demonstrated impact in their ability to incorporate successively higher numbers transistors and construct electronic devices onto a single CMOS chip. Photonic integrated circuits (PICs) exist as the optical analog to integrated circuits; however, in place of transistors, PICs consist of numerous scaled optical components, including such "building-block" structures as waveguides, MMIs, lasers, and optical ring resonators. The ability to construct electronic and photonic components on a single microsystems platform offers transformative potential for the development of technologies in fields including communications, biomedical device development, autonomous navigation, and chemical and atmospheric sensing. Developing on-chip systems that provide new avenues for integration and replacement of bulk optical and electro-optic components also reduces size, weight, power and cost (SWaP-C) limitations, which are important in the selection of instrumentation for specific flight projects. The number of applications currently emerging for complex photonics systems-particularly in data communications-warrants additional investigations when considering reliability for space systems development. This Body of Knowledge document seeks to provide an overview of existing integrated photonics architectures; the current state of design, development, and fabrication ecosystems in the United States and Europe; and potential space applications, with emphasis given to associated radiation effects and reliability

Financial Resources and Technology to Transition to 450mm Semiconductor Wafer Foundries

Future 450mm semiconductor wafer foundries are expected to produce billions of low cost, leading-edge processors, memories, and wireless sensors for Internet of Everything applications in smart cities, smart grids, and smart infrastructures. The problem has been a lack of wise investment decision making using traditional semiconductor industry models. The purpose of this study was to design decision-making models to conserve financial resources from conception to commercialization using real options to optimize production capacity, to defer an investment, and to abandon the project. The study consisted of 4 research questions that compared net present value from real option closed-form equations and binomial lattice models using the Black-Scholes option pricing theory. Three had focused on sensitivity parameters. Moore\u27s second law was applied to find the total foundry cost. Data were collected using snowball sampling and face-to-face surveys. Original survey data from 46 Americans in the U.S.A. were compared to 46 Europeans in Germany. Data were analyzed with a paired-difference test and the Box-Behnken design was employed to create prediction models to support each hypothesis. Data from the real option models and survey findings indicate American 450mm foundries will likely capture greater value and will choose the differentiation strategy to produce premium chips, whereas higher capacity, cost leadership European foundries will produce commodity chips. Positive social change and global quality of life improvements are expected to occur by 2020 when semiconductors will be needed for the $14 trillion Internet of Everything market to create safe self-driving vehicles, autonomous robots, smart homes, novel medical electronics, wearable computers with streaming augmented reality information, and digital wallets for cashless societies

Materials jetting for advanced optoelectronic interconnect: technologies and application

This report covers the work carried out on Teaching Company Scheme No. 2275 "Materials Jetting for Advanced Interconnect" between February 1998 and February 2000. The project was conducted at the Harlow laboratories of Nortel Networks with the support of the Department of Manufacturing Engineering of Loughborough University. Technical direction and supervision has been provided by Mr Paul Conway, Reader, at Loughborough University, Professor Ken Snowdon and Mr Chris Tanner of Nortel Networks. The aim of the project was to produce and deposit minute and precise volumes of a range of materials, such as metallic alloys, glasses and polymers, onto a variety of substrates commonly used in the electronics and optoelectronics fields. The technology, which is analogous to ink-jet printing, firstly had to be refined to accommodate higher processing temperatures of up to 350°C. The ultimate project deliverable was to produce a specification for jetting equipment suited towards volume manufacturing. [Continues.

Design Techniques for Lithography-Friendly Nanometer CMOS Integrated Circuits

The Integrated Circuits industry has been a major driver of the outstanding changes and improvements in the modern day technology and life style that we are observing in our day to day life. The continuous scaling of CMOS technology has been one of the major challenges and success stories. However, as the CMOS technology advances deeply into the deep sub-micron technology nodes, the whole industry (both manufacturing and design) is starting to face new challenges. One major challenge is the control of the variation in device parameters. Lithography variations result from the industry incapability to come up with new light sources with a smaller wavelength than ArF source (193 nm wavelength). In this research, we develop better understanding of the photo-lithography variations and their effect on how the design gets patterned. We investigate the state-of-the-art mask correction and design manipulation techniques. We are focusing in our study on the different Optical Proximity Correction (OPC) and design retargeting techniques to assess how we can improve both the functional and parametric yield. Our goal is to achieve a fast and accurate Model Based Re-Targeting (MBRT) technique that can achieve a better functional yield during manufacturing by establishing the techniques to produce more lithography-friendly targets. Moreover, it can be easily integrated into a fab's PDK (due to its relatively high speed) to feedback the exact final printing on wafer to the designers during the early design phase. In this thesis, we focus on two main topics. First is the development of a fast technique that can predict the final mask shape with reasonable accuracy. This is our proposed Model-based Initial Bias (MIB) methodology, in which we develop the full methodology for creating compact models that can predict the perturbation needed to get to an OPC initial condition that is much closer to the final solution. This is very useful in general in the OPC domain, where it can save almost 50% of the OPC runtime. We also use MIB in our proposed Model-Based Retargeting (MBRT) flow to accurately compute lithography hot-spots location and severity. Second, we develop the fast model-based retargeting methodology that is capable of fixing lithography hot spots and improving the functional yield. Moreover, in this methodology we introduce to the first time the concept of distributed retargeting. In distributed MBRT, not only the design portion that is suffering from the hot-spot is moving to get it fixed but also the surrounding designs and design fragments also contribute to the hot-spot fix. Our proposed model-based retargeting methodology also includes the multiple-patterning awareness as well as the electrical-connectivity-awareness (via-awareness). We used Mentor Graphics Calibre Litho-API c-based programing to develop all of the methodologies we explain in this thesis and tested it on 20nm and 10nm nodes

Infrared Radiation

This book represents a collection of scientific articles covering the field of infrared radiation. It offers extensive information about current scientific research and engineering developments in this area. Each chapter has been thoroughly revised and each represents significant contribution to the scientific community interested in this matter. Developers of infrared technique, technicians using infrared equipment and scientist that have interest in infrared radiation and its interaction with medium will comprise the main readership as they search for current studies on the use of infrared radiation. Moreover this book can be useful to students and postgraduates with appropriate specialty and also for multifunctional workers