Saw-Less radio receivers in CMOS

Smartphones play an essential role in our daily life. Connected to the internet, we can easily keep in touch with family and friends, even if far away, while ever more apps serve us in numerous ways. To support all of this, higher data rates are needed for ever more wireless users, leading to a very crowded radio frequency spectrum. To achieve high spectrum efficiency while reducing unwanted interference, high-quality band-pass filters are needed. Piezo-electrical Surface Acoustic Wave (SAW) filters are conventionally used for this purpose, but such filters need a dedicated design for each new band, are relatively bulky and also costly compared to integrated circuit chips. Instead, we would like to integrate the filters as part of the entire wireless transceiver with digital smartphone hardware on CMOS chips. The research described in this thesis targets this goal. It has recently been shown that N-path filters based on passive switched-RC circuits can realize high-quality band-select filters on CMOS chips, where the center frequency of the filter is widely tunable by the switching-frequency. As CMOS downscaling following Moore’s law brings us lower clock-switching power, lower switch on-resistance and more compact metal-to-metal capacitors, N-path filters look promising. This thesis targets SAW-less wireless receiver design, exploiting N-path filters. As SAW-filters are extremely linear and selective, it is very challenging to approximate this performance with CMOS N-path filters. The research in this thesis proposes and explores several techniques for extending the linearity and enhancing the selectivity of N-path switched-RC filters and mixers, and explores their application in CMOS receiver chip designs. First the state-of-the-art in N-path filters and mixer-first receivers is reviewed. The requirements on the main receiver path are examined in case SAW-filters are removed or replaced by wideband circulators. The feasibility of a SAW-less Frequency Division Duplex (FDD) radio receiver is explored, targeting extreme linearity and compression Irequirements. A bottom-plate mixing technique with switch sharing is proposed. It improves linearity by keeping both the gate-source and gate-drain voltage swing of the MOSFET-switches rather constant, while halving the switch resistance to reduce voltage swings. A new N-path switch-RC filter stage with floating capacitors and bottom-plate mixer-switches is proposed to achieve very high linearity and a second-order voltage-domain RF-bandpass filter around the LO frequency. Extra out-of-band (OOB) rejection is implemented combined with V-I conversion and zero-IF frequency down-conversion in a second cross-coupled switch-RC N-path stage. It offers a low-ohmic high-linearity current path for out-of-band interferers. A prototype chip fabricated in a 28 nm CMOS technology achieves an in-band IIP3 of +10 dBm , IIP2 of +42 dBm, out-of-band IIP3 of +44 dBm, IIP2 of +90 dBm and blocker 1-dB gain-compression point of +13 dBm for a blocker frequency offset of 80 MHz. At this offset frequency, the measured desensitization is only 0.6 dB for a 0-dBm blocker, and 3.5 dB for a 10-dBm blocker at 0.7 GHz operating frequency (i.e. 6 and 9 dB blocker noise figure). The chip consumes 38-96 mW for operating frequencies of 0.1-2 GHz and occupies an active area of 0.49 mm2. Next, targeting to cover all frequency bands up to 6 GHz and achieving a noise figure lower than 3 dB, a mixer-first receiver with enhanced selectivity and high dynamic range is proposed. Capacitive negative feedback across the baseband amplifier serves as a blocker bypassing path, while an extra capacitive positive feedback path offers further blocker rejection. This combination of feedback paths synthesizes a complex pole pair at the input of the baseband amplifier, which is up-converted to the RF port to obtain steeper RF-bandpass filter roll-off than the conventional up-converted real pole and reduced distortion. This thesis explains the circuit principle and analyzes receiver performance. A prototype chip fabricated in 45 nm Partially Depleted Silicon on Insulator (PDSOI) technology achieves high linearity (in-band IIP3 of +3 dBm, IIP2 of +56 dBm, out-of-band IIP3 = +39 dBm, IIP2 = +88 dB) combined with sub-3 dB noise figure. Desensitization due to a 0-dBm blocker is only 2.2 dB at 1.4 GHz operating frequency. IIFinally, to demonstrate the performance of the implemented blocker-tolerant receiver chip designs, a test setup with a real mobile phone is built to verify the sensitivity of the receiver chip for different practical blocking scenarios

Fully-Integrated Magnetic-Free Nonreciprocal Components by Breaking Lorentz Reciprocity: from Physics to Applications

Reciprocity is a fundamental physical precept that governs wave propagation in a wide variety of physical domains. The various reciprocity theorems state that the response of a system remains unchanged if the excitation source and the measuring point are interchanged within a medium, and are closely related to the concept of time reversal symmetry in physics. Lorentz reciprocity is a fundamental characteristic of linear, time-invariant electronic and photonic structures with symmetric permittivity and permeability tensors. However, breaking reciprocity enables the realization of nonreciprocal components, such as isolators and circulators, which are critical to electronic, optical and acoustic systems, as well as new functionalities and devices based on novel wave propagation modes. Nonreciprocal components have traditionally relied on magnetic materials such as ferrites that lose reciprocity under the application of an external magnetic field through the Faraday Effect. The need for a magnetic bias limits the applicability of such approaches in small-form-factor Complementary Metal–Oxide–Semiconductor (CMOS)-compatible integrated devices. One of the main features of CMOS technology is the availability of high-speed transistor switches which can be turned ON and OFF, modulating the conductance of the medium. In this dissertation, a novel approach to break Lorentz reciprocity is presented based on staggered commutation in Linear Periodically-Time-Varying (LPTV) circuits. We have demonstrated the world’s first CMOS passive magnetic-free nonreciprocal circulator through spatio-temporal conductivity modulation. Since conductivity in semiconductors can be modulated over a wide range (CMOS transistor ON/OFF conductance ratio at Radio Frequency (RF)/millimeter-wave frequencies is as high as 103-105), commutated LPTV networks break reciprocity within a deeply sub-wavelength form-factor with low loss and high linearity. The resulting nonreciprocal components find application in antenna interfaces of wireless communication systems, connecting the Transmitter (TX) and the Receiver (RX) to a shared antenna. This is particularly important for full-duplex wireless, where the TX and the RX operate simultaneously at the same frequency band and need to be highly isolated in order to maintain receiver sensitivity. Multiple fully-integrated full-duplex receivers are demonstrated in this dissertation that best show the synergy between the physical concept and application-based implementations by using circuit techniques to benefit the system-level performance, such as TX-side linearity enhancement and co-design and co-optimization of the antenna interface and the RX and utilization of the multi-phase structure of our antenna interfaces for analog beamforming in multi-antenna systems. Finally, this dissertation discusses some of the fundamental limits of space-time modulated nonreciprocal structures, as well as new directions to build nonreciprocal components which can ideally be infinitesimal in size. A novel family of inductor-less nonreciprocal components including circulators and isolators have been demonstrated that achieve a wide tuning range in an infinitesimal form-factor. This family of devices combine reciprocal and nonreciprocal modes of operation, through the transfer properties of fundamental and harmonics of the system and enable a wide variety of functionalities

Simplified unified analysis of switched-RC passive mixers, samplers, and N -Path filters using the adjoint network

Recent innovations in software defined CMOS radio transceiver architectures heavily rely on high linearity switched-RC sampler and passive-mixer circuits, driven by digitally programmable multiphase clocks. Although seemingly simple, the frequency domain analysis of these linear periodically time variant (LPTV) circuits is often deceptively complex. This paper uses the properties of sampled LPTV systems and the adjoint (inter-reciprocal) network to greatly simplify the analysis of the switched-RC circuit. We first derive the transfer function of the equivalent linear time-invariant filter relating the input to the voltage sampled on the capacitor in the switched-RC kernel. We show how a leakage resistor across the capacitor can be easily addressed using our technique. A signal-flow graph is then developed for the complete continuous-time voltage waveform across the capacitor, and simplified for various operating regions. We finally derive the noise properties of the kernel. The results we derive have largely been reported in prior works, but the use of the adjoint network simplifies the derivation, while also providing circuit insight

Radar Technology

In this book “Radar Technology”, the chapters are divided into four main topic areas: Topic area 1: “Radar Systems” consists of chapters which treat whole radar systems, environment and target functional chain. Topic area 2: “Radar Applications” shows various applications of radar systems, including meteorological radars, ground penetrating radars and glaciology. Topic area 3: “Radar Functional Chain and Signal Processing” describes several aspects of the radar signal processing. From parameter extraction, target detection over tracking and classification technologies. Topic area 4: “Radar Subsystems and Components” consists of design technology of radar subsystem components like antenna design or waveform design