46,622 research outputs found
E-QED: Electrical Bug Localization During Post-Silicon Validation Enabled by Quick Error Detection and Formal Methods
During post-silicon validation, manufactured integrated circuits are
extensively tested in actual system environments to detect design bugs. Bug
localization involves identification of a bug trace (a sequence of inputs that
activates and detects the bug) and a hardware design block where the bug is
located. Existing bug localization practices during post-silicon validation are
mostly manual and ad hoc, and, hence, extremely expensive and time consuming.
This is particularly true for subtle electrical bugs caused by unexpected
interactions between a design and its electrical state. We present E-QED, a new
approach that automatically localizes electrical bugs during post-silicon
validation. Our results on the OpenSPARC T2, an open-source
500-million-transistor multicore chip design, demonstrate the effectiveness and
practicality of E-QED: starting with a failed post-silicon test, in a few hours
(9 hours on average) we can automatically narrow the location of the bug to
(the fan-in logic cone of) a handful of candidate flip-flops (18 flip-flops on
average for a design with ~ 1 Million flip-flops) and also obtain the
corresponding bug trace. The area impact of E-QED is ~2.5%. In contrast,
deter-mining this same information might take weeks (or even months) of mostly
manual work using traditional approaches
Perturbation of the sierpinski antenna to allocate the operating bands
A scheme for modifying the spacing between the bands of the Sierpinski antenna is introduced. Experimental results of two novel designs of fractal antennas suggest that the fractal structure can be perturbed to enable the log-period to be changed while still maintaining the multiband behaviour of the antenna.Peer ReviewedPostprint (published version
Accurate robot simulation through system identification
Robot simulators are useful tools for developing robot behaviours. They provide a fast and efficient means to test robot control code at the convenience of the office
desk. In all but the simplest cases though, due to the complexities of the physical systems modelled in the simulator, there are considerable differences between the
behaviour of the robot in the simulator and that in the real world environment. In this paper we present a novel method to create a robot simulator using real sensor data. Logged sensor data is used to construct a mathematically explicit model(in the form of a NARMAX polynomial) of the robot’s environment. The advantage of such a transparent model — in contrast to opaque modelling methods such as
artificial neural networks — is that it can be analysed to characterise the modelled system, using established mathematical methods In this paper we compare the behaviour of the robot running a particular task in
both the simulator and the real-world using qualitative and quantitative measures including statistical methods to investigate the faithfulness of the simulator
DPA on quasi delay insensitive asynchronous circuits: formalization and improvement
The purpose of this paper is to formally specify a flow devoted to the design
of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The
paper first proposes a formal modeling of the electrical signature of QDI
asynchronous circuits. The DPA is then applied to the formal model in order to
identify the source of leakage of this type of circuits. Finally, a complete
design flow is specified to minimize the information leakage. The relevancy and
efficiency of the approach is demonstrated using the design of an AES
crypto-processor.Comment: Submitted on behalf of EDAA (http://www.edaa.com/
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