Output Filter Aware Optimization of the Noise Shaping Properties of {\Delta}{\Sigma} Modulators via Semi-Definite Programming

The Noise Transfer Function (NTF) of {\Delta}{\Sigma} modulators is typically designed after the features of the input signal. We suggest that in many applications, and notably those involving D/D and D/A conversion or actuation, the NTF should instead be shaped after the properties of the output/reconstruction filter. To this aim, we propose a framework for optimal design based on the Kalman-Yakubovich-Popov (KYP) lemma and semi-definite programming. Some examples illustrate how in practical cases the proposed strategy can outperform more standard approaches.Comment: 14 pages, 18 figures, journal. Code accompanying the paper is available at http://pydsm.googlecode.co

Adaptive High-Bandwidth Digitally Controlled Buck Converter with Improved Line and Load Transient Response

Digitally controlled switching converter suffers from bandwidth limitation because of the additional phase delay in the digital feedback control loop. In order to overcome the bandwidth limitation without using a high sampling rate, this paper presents an adaptive third-order digital controller for regulating a voltage-mode buck converter with a modest 2x oversampling ratio. The phase lag due to the ADC conversion time delay is virtually compensated by providing an early estimation of the error voltage for the next sampling time instant, enabling a higher unity-gain bandwidth without compromising stability. An additional pair of low-frequency pole and zero in the third-order controller increases the low-frequency gain, resulting in faster settling time and smaller output voltage deviation during line transient. Both simulation and experimental results demonstrate that the proposed adaptive third-order controller reduces the settling time by 50% in response to a 1 V line transient and 30% in response to a 600 mA load transient, compared to the baseline static second-order controller. The fastest settling time is measured to be around 11.70 s, surpassing the transient performance of conventional digital controllers and approaching that of the state-of-the-art analog-based controllers.postprin

Ultra-low noise, high-frame rate readout design for a 3D-stacked CMOS image sensor

Due to the switch from CCD to CMOS technology, CMOS based image sensors have become smaller, cheaper, faster, and have recently outclassed CCDs in terms of image quality. Apart from the extensive set of applications requiring image sensors, the next technological breakthrough in imaging would be to consolidate and completely shift the conventional CMOS image sensor technology to the 3D-stacked technology. Stacking is recent and an innovative technology in the imaging field, allowing multiple silicon tiers with different functions to be stacked on top of each other. The technology allows for an extreme parallelism of the pixel readout circuitry. Furthermore, the readout is placed underneath the pixel array on a 3D-stacked image sensor, and the parallelism of the readout can remain constant at any spatial resolution of the sensors, allowing extreme low noise and a high-frame rate (design) at virtually any sensor array resolution. The objective of this work is the design of ultra-low noise readout circuits meant for 3D-stacked image sensors, structured with parallel readout circuitries. The readout circuit’s key requirements are low noise, speed, low-area (for higher parallelism), and low power. A CMOS imaging review is presented through a short historical background, followed by the description of the motivation, the research goals, and the work contributions. The fundamentals of CMOS image sensors are addressed, as a part of highlighting the typical image sensor features, the essential building blocks, types of operation, as well as their physical characteristics and their evaluation metrics. Following up on this, the document pays attention to the readout circuit’s noise theory and the column converters theory, to identify possible pitfalls to obtain sub-electron noise imagers. Lastly, the fabricated test CIS device performances are reported along with conjectures and conclusions, ending this thesis with the 3D-stacked subject issues and the future work. A part of the developed research work is located in the Appendices.Devido à mudança da tecnologia CCD para CMOS, os sensores de imagem em CMOS tornam se mais pequenos, mais baratos, mais rápidos, e mais recentemente, ultrapassaram os sensores CCD no que respeita à qualidade de imagem. Para além do vasto conjunto de aplicações que requerem sensores de imagem, o próximo salto tecnológico no ramo dos sensores de imagem é o de mudar completamente da tecnologia de sensores de imagem CMOS convencional para a tecnologia “3D-stacked”. O empilhamento de chips é relativamente recente e é uma tecnologia inovadora no campo dos sensores de imagem, permitindo vários planos de silício com diferentes funções poderem ser empilhados uns sobre os outros. Esta tecnologia permite portanto, um paralelismo extremo na leitura dos sinais vindos da matriz de píxeis. Além disso, num sensor de imagem de planos de silício empilhados, os circuitos de leitura estão posicionados debaixo da matriz de píxeis, sendo que dessa forma, o paralelismo pode manter-se constante para qualquer resolução espacial, permitindo assim atingir um extremo baixo ruído e um alto debito de imagens, virtualmente para qualquer resolução desejada. O objetivo deste trabalho é o de desenhar circuitos de leitura de coluna de muito baixo ruído, planeados para serem empregues em sensores de imagem “3D-stacked” com estruturas altamente paralelizadas. Os requisitos chave para os circuitos de leitura são de baixo ruído, rapidez e pouca área utilizada, de forma a obter-se o melhor rácio. Uma breve revisão histórica dos sensores de imagem CMOS é apresentada, seguida da motivação, dos objetivos e das contribuições feitas. Os fundamentos dos sensores de imagem CMOS são também abordados para expor as suas características, os blocos essenciais, os tipos de operação, assim como as suas características físicas e suas métricas de avaliação. No seguimento disto, especial atenção é dada à teoria subjacente ao ruído inerente dos circuitos de leitura e dos conversores de coluna, servindo para identificar os possíveis aspetos que dificultem atingir a tão desejada performance de muito baixo ruído. Por fim, os resultados experimentais do sensor desenvolvido são apresentados junto com possíveis conjeturas e respetivas conclusões, terminando o documento com o assunto de empilhamento vertical de camadas de silício, junto com o possível trabalho futuro

Distributed multi-user MIMO transmission using real-time sigma-delta-over-fiber for next generation fronthaul interface

To achieve the massive device connectivity and high data rate demanded by 5G, wireless transmission with wider signal bandwidths and higher-order multiple-input multiple-output (MIMO) is inevitable. This work demonstrates a possible function split option for the next generation fronthaul interface (NGFI). The proof-of-concept downlink architecture consists of real-time sigma-delta modulated signal over fiber (SDoF) links in combination with distributed multi-user (MU) MIMO transmission. The setup is fully implemented using off-the-shelf and in-house developed components. A single SDoF link achieves an error vector magnitude (EVM) of 3.14% for a 163.84 MHz-bandwidth 256-QAM OFDM signal (958.64 Mbps) with a carrier frequency around 3.5 GHz transmitted over 100 m OM4 multi-mode fiber at 850 nm using a commercial QSFP module. The centralized architecture of the proposed setup introduces no frequency asynchronism among remote radio units. For most cases, the 2 x 2 MU-MIMO transmission has little performance degradation compared to SISO, 0.8 dB EVM degradation for 40.96 MHz-bandwidth signals and 1.4 dB for 163.84 MHz-bandwidth on average, implying that the wireless spectral efficiency almost doubles by exploiting spatial multiplexing. A 1.4 Gbps data rate (720 Mbps per user, 163.84 MHz-bandwidth, 64-QAM) is reached with an average EVM of 6.66%. The performance shows that this approach is feasible for the high-capacity hot-spot scenario

Portable Ultrasound Imaging

This PhD project investigates hardware strategies and imaging methods for hand-held ultrasound systems. The overall idea is to use a wireless ultrasound probe linked to general-purpose mobile devices for the processing and visualization. The approach has the potential to reduce the upfront costs of the ultrasound system and, consequently, to allow for a wide-scale utilization of diagnostic ultrasound in any medical specialties and out of the radiology department. The first part of the contribution deals with the study of hardware solutions for the reduction of the system complexity. Analog and digital beamforming strategies are simulated from a system-level perspective. The quality of the B-mode image is evaluated and the minimum specifications are derived for the design of a portable probe with integrated electronics in-handle. The system is based on a synthetic aperture sequential beamforming approach that allows to significantly reduce the data rate between the probe and processing unit. The second part investigates the feasibility of vector flow imaging in a hand-held ultrasound system. Vector flow imaging overcomes the limitations of conventional imaging methods in terms of flow angle compensation. Furthermore, high frame rate can be obtained by using synthetic aperture focusing techniques. A method is developed combining synthetic aperture sequential beamforming and directional transverse oscillation to achieve the wireless transmission of the data along with a relatively inexpensive 2-D velocity estimation. The performance of the method is thoroughly assessed through simulations and measurements, and in vivo investigations are carried out to show its potential in presence of complex flow dynamics. A sufficient frame rate is achieved to allow for the visualization of vortices in the carotid bifurcation. Furthermore, the method is implemented on a commercially available tablet to evaluate the real-time processing performance in the built-in GPU with concurrent wireless transmission of the data. Based on the demonstrations in this thesis, a flexible framework can be implemented with performance that can be scaled to the needs of the user and according to the computing resources available. The integration of high-frame-rate vector flow imaging in a hand-held ultrasound scanner, in addition, has the potential to improve the operator’s workflow and opens the way to new possibilities in the clinical practice

뇌파를 이용한 단독 렘수면행동장애의 시누클레인병증 발병 시기 및 아형 예측을 위한 기계 학습 모델

학위논문(석사) -- 서울대학교대학원 : 공과대학 협동과정 바이오엔지니어링전공, 2023. 2. 정기영.Objective: Isolated rapid eye movement sleep behavior disorder (iRBD) is a prodromal disease of α-synucleinopathies, and more than 80% of cases eventually convert to neurodegenerative diseases including Parkinsons disease (PD), dementia with Lewy bodies (DLB) and multiple system atrophy (MSA). Baseline resting-state electroencephalography (EEG) was reported to be associated with the phenoconversion. This study aimed to develop a prediction model for α-synucleinopathy phenoconversion time and subtype using EEG at baseline in iRBD. Methods: At baseline, resting-state EEG and neurological assessments were performed on patients with iRBD. EEG spectral power, weighted phase lag index and Shannon entropy were used as features. Three models were used for survival prediction, and four models were applied for subtype prediction to PD-MSA and DLB. In addition, external validation was performed. Results: 233 patients were followed-up for up to nine years (mean 4.1 years), and 29 converted to α-synucleinopathies (14 PD, 9 DLB, 6 MSA). The best model for survival prediction was the random survival forest with an integrated Brier score of 0.113 and a concordance index of 0.721. K-nearest neighbor was the best model for the subtype prediction with an area under the receiver operating characteristic curve of 0.908. Features related to EEG slowing showed high importance in both models. Conclusions: Machine learning models using EEG biomarker can be able to predict phenoconversion time and subtype in iRBD. Further study including large sample data from various countries is needed to corroborate our results.연구 배경: 단독 렘수면행동장애(iRBD) 환자는 알파-시누클레인병증의 전구 질환으로 80% 이상이 15년 이내에 파킨슨병(PD), 루이소체 치매(DLB), 다계통위축증(MSA)과 같은 신경퇴행성 질환으로 전환되는 것으로 잘 알려져 있다. 기준선 휴지기 뇌파는 알파-시누클레인병증 발병과 관련이 있는 것으로 보고되었다. 이 연구는 iRBD의 기준선에서 뇌파를 이용하여 알파-시누클레인병증 발병 시기 및 아형에 대한 예측 모델을 개발하는 것을 목표로 하였다. 연구 방법: 기준선에서 iRBD 환자에 대해 휴지기 뇌파 및 신경학적 평가를 수행하였다. 뇌파 스펙트럼 파워, 가중 위상 지연 지수, 섀넌 엔트로피를 특징으로 사용하였다. PD-MSA 및 DLB 그룹에 대한 생존 예측을 위해 3개의 모델이 사용되었고 아형 예측을 위해 4개의 모델이 적용되었다. 또한 외부 검증을 수행하였다. 연구 결과: 233명의 환자를 최대 9년(평균 3.4년) 동안 추적 관찰했으며, 29명에서 알파-시누클레인병증이 발병하였다(PD 14명, DLB 9명, MSA 6명). 생존 예측을 위한 최상의 모델은 통합 브라이어 점수(IBS)가 0.113이고 우위성 지수(C-index)가 0.721인 Random survival forest 모델이었다. K-nearest neighbor 모델은 수신자 동작 특성 곡선 아래 면적이 0.908로 아형 예측 분석에 가장 적합한 모델이었다. 뇌파 감속과 관련된 기능은 두 모델 모두에서 높은 중요성을 보였다. 결론: 뇌파 바이오마커를 이용한 기계 학습 모델은 iRBD에서 알파-시누클레인병증 발병 시기 및 아형을 예측할 수 있다. 우리의 결과를 확증하기 위해서는 다양한 국가의 대규모 샘플 데이터를 포함한 추가 연구가 필요하다.Chapter 1. Introduction 1 Chapter 2. Material and methods 3 2.1. Participants 3 2.2. EEG recordings and preprocessing 4 2.3. Experimental procedures 5 2.3.1. EEG features 5 2.3.2. Survival prediction of phenoconversion 8 2.3.3. Subtype prediction of phenoconversion 8 2.4. Statistical analysis 12 Chapter 3. Results 13 3.1. Participant characteristics 13 3.2. Survival prediction 20 3.3. Subtype prediction 26 Chapter 4. Discussion 32 Bibliography 35 국문 초록 41석

Multiband Analog-to-Digital Conversion

The current trend in the world of digital communications is the design of versatile devices that may operate using several different communication standards in order to increase the number of locations for which a particular device may be used. The signal is quantized early on in the reciever path by Analog-to-Digital Converters (ADCs), which allows the rest of the signal processing to be done by low complexity, low power digital circuits. For this reason, it is advantageous to create an architecture that can quantize different bandwidths at different frequencies to suit several different communication protocols. This thesis outlines the design of an architecture that uses multiple ADCs in parallel to quantize several different bandwidths of a wideband signal. A multirate filter bank is then applied to approximate perfect reconstruction of the wideband signal from its subband parts. This highly flexible architecture is able to quantize signals of varying bandwidths at a wide range of frequencies by using identical hardware in every channel, which also makes for a simple design. A prototype for the quantizer used in each channel, a frequency-selective fourth-order sigma-delta (CA ) ADC, was designed and fabricated in a 0.5 pm CMOS process. This device uses a switched-capacitor technique to implement the frequency selection in the front-end of the CA ADC in each channel. Running at a 5MHz sample rate, the device can select any of the first sixteen 156.25kHz wide bands for conversion. Testing results for this fabricated part are also presented