On finding hamiltonian cycles in Barnette graphs

In this paper, we deal with hamiltonicity in planar cubic graphs G having a facial 2-factor Q via (quasi) spanning trees of faces in G/Q and study the algorithmic complexity of finding such (quasi) spanning trees of faces. Moreover, we show that if Barnette's Conjecture is false, then hamiltonicity in 3-connected planar cubic bipartite graphs is an NP-complete problem.Comment: arXiv admin note: substantial text overlap with arXiv:1806.0671

A tight relation between series--parallel graphs and bipartite distance hereditary graphs

Bandelt and Mulder’s structural characterization of bipartite distance hereditary graphs asserts that such graphs can be built inductively starting from a single vertex and by re17 peatedly adding either pendant vertices or twins (i.e., vertices with the same neighborhood as an existing one). Dirac and Duffin’s structural characterization of 2–connected series–parallel graphs asserts that such graphs can be built inductively starting from a single edge by adding either edges in series or in parallel. In this paper we give an elementary proof that the two constructions are the same construction when bipartite graphs are viewed as the fundamental graphs of a graphic matroid. We then apply the result to re-prove known results concerning bipartite distance hereditary graphs and series–parallel graphs and to provide a new class of polynomially-solvable instances for the integer multi-commodity flow of maximum valu

Exact Meander Asymptotics: a Numerical Check

This note addresses the meander enumeration problem: "Count all topologically inequivalent configurations of a closed planar non self-intersecting curve crossing a line through a given number of points". We review a description of meanders introduced recently in terms of the coupling to gravity of a two-flavored fully-packed loop model. The subsequent analytic predictions for various meandric configuration exponents are checked against exact enumeration, using a transfer matrix method, with an excellent agreement.Comment: 48 pages, 24 figures, tex, harvmac, eps

Generic method for bijections between blossoming trees and planar maps

This article presents a unified bijective scheme between planar maps and blossoming trees, where a blossoming tree is defined as a spanning tree of the map decorated with some dangling half-edges that enable to reconstruct its faces. Our method generalizes a previous construction of Bernardi by loosening its conditions of applications so as to include annular maps, that is maps embedded in the plane with a root face different from the outer face. The bijective construction presented here relies deeply on the theory of \alpha-orientations introduced by Felsner, and in particular on the existence of minimal and accessible orientations. Since most of the families of maps can be characterized by such orientations, our generic bijective method is proved to capture as special cases all previously known bijections involving blossoming trees: for example Eulerian maps, m-Eulerian maps, non separable maps and simple triangulations and quadrangulations of a k-gon. Moreover, it also permits to obtain new bijective constructions for bipolar orientations and d-angulations of girth d of a k-gon. As for applications, each specialization of the construction translates into enumerative by-products, either via a closed formula or via a recursive computational scheme. Besides, for every family of maps described in the paper, the construction can be implemented in linear time. It yields thus an effective way to encode and generate planar maps. In a recent work, Bernardi and Fusy introduced another unified bijective scheme, we adopt here a different strategy which allows us to capture different bijections. These two approaches should be seen as two complementary ways of unifying bijections between planar maps and decorated trees.Comment: 45 pages, comments welcom

Matroids, delta-matroids and embedded graphs

Matroid theory is often thought of as a generalization of graph theory. In this paper we propose an analogous correspondence between embedded graphs and delta-matroids. We show that delta-matroids arise as the natural extension of graphic matroids to the setting of embedded graphs. We show that various basic ribbon graph operations and concepts have delta-matroid analogues, and illustrate how the connections between embedded graphs and delta-matroids can be exploited. Also, in direct analogy with the fact that the Tutte polynomial is matroidal, we show that several polynomials of embedded graphs from the literature, including the Las Vergnas, Bollabás-Riordan and Krushkal polynomials, are in fact delta-matroidal

Transistor-Level Layout of Integrated Circuits

In this dissertation, we present the toolchain BonnCell and its underlying algorithms. It has been developed in close cooperation with the IBM Corporation and automatically generates the geometry for functional groups of 2 to approximately 50 transistors. Its input consists of a set of transistors, including properties like their sizes and their types, a specification of their connectivity, and parameters to flexibly control the technological framework as well as the algorithms' behavior. Using this data, the tool computes a detailed geometric realization of the circuit as polygonal shapes on 16 layers. To this end, a placement routine configures the transistors and arranges them in the plane, which is the main subject of this thesis. Subsequently, a routing engine determines wires connecting the transistors to ensure the circuit's desired functionality. We propose and analyze a family of algorithms that arranges sets of transistors in the plane such that a multi-criteria target function is optimized. The primary goal is to obtain solutions that are as compact as possible because chip area is a valuable resource in modern techologies. In addition to the core algorithms we formulate variants that handle particularly structured instances in a suitable way. We will show that for 90% of the instances in a representative test bed provided by IBM, BonnCell succeeds to generate fully functional layouts including the placement of the transistors and a routing of their interconnections. Moreover, BonnCell is in wide use within IBM's groups that are concerned with transistor-level layout - a task that has been performed manually before our automation was available. Beyond the processing of isolated test cases, two large-scale examples for applications of the tool in the industry will be presented: On the one hand the initial design phase of a large SRAM unit required only half of the expected 3 month period, on the other hand BonnCell could provide valuable input aiding central decisions in the early concept phase of the new 14 nm technology generation