Configuration study for a 30 GHz monolithic receive array, volume 1

Gregorian, Cassegrain, and single reflector systems were analyzed in configuration studies for communications satellite receive antennas. Parametric design and performance curves were generated. A preliminary design of each reflector/feed system was derived including radiating elements, beam-former network, beamsteering system, and MMIC module architecture. Performance estimates and component requirements were developed for each design. A recommended design was selected for both the scanning beam and the fixed beam case. Detailed design and performance analysis results are presented for the selected Cassegrain configurations. The final design point is characterized in detail and performance measures evaluated in terms of gain, sidelobe level, noise figure, carrier-to-interference ratio, prime power, and beamsteering. The effects of mutual coupling and excitation errors (including phase and amplitude quantization errors) are evaluated. Mechanical assembly drawings are given for the final design point. Thermal design requirements are addressed in the mechanical design

Deployable antenna phase A study

Applications for large deployable antennas were re-examined, flight demonstration objectives were defined, the flight article (antenna) was preliminarily designed, and the flight program and ground development program, including the support equipment, were defined for a proposed space transportation system flight experiment to demonstrate a large (50 to 200 meter) deployable antenna system. Tasks described include: (1) performance requirements analysis; (2) system design and definition; (3) orbital operations analysis; and (4) programmatic analysis

A Study of Linear Approximation Techniques for SAR Azimuth Processing

The application of the step transform subarray processing techniques to synthetic aperture radar (SAR) was studied. The subarray technique permits the application of efficient digital transform computational techniques such as the fast Fourier transform to be applied while offering an effective tool for range migration compensation. Range migration compensation is applied at the subarray level, and with the subarray size based on worst case range migration conditions, a minimum control system is achieved. A baseline processor was designed for a four-look SAR system covering approximately 4096 by 4096 SAR sample field every 2.5 seconds. Implementation of the baseline system was projected using advanced low power technologies. A 20 swath is implemented with approximately 1000 circuits having a power dissipation of from 70 to 195 watts. The baseline batch step transform processor is compared to a continuous strip processor, and variations of the baseline are developed for a wide range of SAR parameters

Optimization in the design of a 12 gigahertz low cost ground receiving system for broadcast satellites. Volume 2: Antenna system and interference

The antenna characteristics are analyzed of a low cost mass-producible ground station to be used in broadcast satellite systems. It is found that a prime focus antenna is sufficient for a low-cost but not a low noise system. For the antenna feed waveguide systems are the best choice for the 12 GHz band, while printed-element systems are recommended for the 2.6 GHz band. Zoned reflectors are analyzed and appear to be attractive from the standpoint of cost. However, these reflectors suffer a gain reduction of about one db and a possible increase in sidelobe levels. The off-axis gain of a non-auto-tracking station can be optimized by establishing a special illumination function at the reflector aperture. A step-feed tracking system is proposed to provide automatic procedures for searching for peak signal from a geostationary satellite. This system uses integrated circuitry and therefore results in cost saving under mass production. It is estimated that a complete step-track system would cost only $512 for a production quantity of 1000 units per year

Advanced digital SAR processing study

A highly programmable, land based, real time synthetic aperture radar (SAR) processor requiring a processed pixel rate of 2.75 MHz or more in a four look system was designed. Variations in range and azimuth compression, number of looks, range swath, range migration and SR mode were specified. Alternative range and azimuth processing algorithms were examined in conjunction with projected integrated circuit, digital architecture, and software technologies. The advaced digital SAR processor (ADSP) employs an FFT convolver algorithm for both range and azimuth processing in a parallel architecture configuration. Algorithm performace comparisons, design system design, implementation tradeoffs and the results of a supporting survey of integrated circuit and digital architecture technologies are reported. Cost tradeoffs and projections with alternate implementation plans are presented