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Variable domain transformation for linear PAC analysis of mixed-signal systems
This paper describes a method to perform linear AC analysis on mixed-signal systems which appear strongly nonlinear in the voltage domain but are linear in other variable domains. Common circuits like phase/delay-locked loops and duty-cycle correctors fall into this category, since they are designed to be linear with respect to phases, delays, and duty-cycles of the input and output clocks, respectively. The method uses variable domain translators to change the variables to which the AC perturbation is applied and from which the AC response is measured. By utilizing the efficient periodic AC (PAC) analysis available in commercial RF simulators, the circuitâs linear transfer function in the desired variable domain can be characterized without relying on extensive transient simulations. Furthermore, the variable domain translators enable the circuits to be macromodeled as weakly-nonlinear systems in the chosen domain and then converted to voltage-domain models, instead of being modeled as strongly-nonlinear systems directly
Architectures for RF Frequency synthesizers
Frequency synthesizers are an essential building block of RF communication products. They can be found in traditional consumer products, in personal communication systems, and in optical communication equipment. Since frequency synthesizers are used in many different applications, different performance aspects may need to be considered in each case. The main body of the text describes a conceptual framework for analyzing the performance of PLL frequency synthesizers, and presents optimization procedures for the different performance aspects. The analysis of the PLL properties is performed with the use of the open-loop bandwidth and phase margin concepts, to enable the influence of higher-order poles to be taken into account from the beginning of the design process. The theoretical system analysis is complemented by descriptions of innovative system and building block architectures, by circuit implementations in bipolar and CMOS technologies, and by measurement results. Architectures for RF Frequency Synthesizers contains basic information for the beginner as well as in-depth knowledge for the experienced designer. It is widely illustrated with practical design examples used in industrial products.\ud
Written for:\ud
Electrical and electronic engineer
Bio-inspired 0.35ÎŒm CMOS Time-to-Digital Converter with 29.3ps LSB
Time-to-digital converter (TDC) integrated circuit is introduced in this paper. It is based on chain of delay elements composing a regular scalable structure. The scheme is analogous to the sound direction sensitivity nerve system found in barn owl. The circuit occupies small silicon area, and its direct mapping from time to position-code makes conversion rates up to 500Msps possible. Specialty of the circuit is the structural and functional symmetry. Therefore the role of start and stop signals are interchangeable. In other words negative delay is acceptable: the circuit has no dead time problems. These are benefits of the biology model of the auditory scene representation in the bird's brain. The prototype chip is implemented in 0.35ÎŒm CMOS having less than 30ps single-shot resolution in the measurements.Hungarian National Research Foundation TS4085
Stray Magnetic Field Compensation with a Scalar Atomic Magnetometer
We describe a system for the compensation of time-dependent stray magnetic
fields using a dual channel scalar magnetometer based on non-linear Faraday
rotation in synchronously optically pumped Cs vapour. We detail the active
control strategy, with an emphasis on the electronic circuitry, based on a
simple phase-locked-loop integrated circuit. The performance and limits of the
system developed are tested and discussed. The system was applied to
significantly improve the detection of free induction decay signals from
protons of remotely magnetized water precessing in an ultra-low magnetic field.Comment: 8 pages, 6 figures, 31 refs, v2 (with minor improvements) appearing
in Rev.Sc.Instr. June 201
Calculation of the Performance of Communication Systems from Measured Oscillator Phase Noise
Oscillator phase noise (PN) is one of the major problems that affect the
performance of communication systems. In this paper, a direct connection
between oscillator measurements, in terms of measured single-side band PN
spectrum, and the optimal communication system performance, in terms of the
resulting error vector magnitude (EVM) due to PN, is mathematically derived and
analyzed. First, a statistical model of the PN, considering the effect of white
and colored noise sources, is derived. Then, we utilize this model to derive
the modified Bayesian Cramer-Rao bound on PN estimation, and use it to find an
EVM bound for the system performance. Based on our analysis, it is found that
the influence from different noise regions strongly depends on the
communication bandwidth, i.e., the symbol rate. For high symbol rate
communication systems, cumulative PN that appears near carrier is of relatively
low importance compared to the white PN far from carrier. Our results also show
that 1/f^3 noise is more predictable compared to 1/f^2 noise and in a fair
comparison it affects the performance less.Comment: Accepted in IEEE Transactions on Circuits and Systems-I: Regular
Paper
Jitter and phase noise in ring oscillators
A companion analysis of clock jitter and phase noise of single-ended and differential ring oscillators is presented. The impulse sensitivity functions are used to derive expressions for the jitter and phase noise of ring oscillators. The effect of the number of stages, power dissipation, frequency of oscillation, and short-channel effects on the jitter and phase noise of ring oscillators is analyzed. Jitter and phase noise due to substrate and supply noise is discussed, and the effect of symmetry on the upconversion of 1/f noise is demonstrated. Several new design insights are given for low jitter/phase-noise design. Good agreement between theory and measurements is observed
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