Analyse eines digitalen Zwillings zur zeitkontinuierlichen Batchoptimierung in der Halbleiterfertigung

Motivated by the ongoing growth in demand for microchips, high production costs and the complex interplay of human, machine, material and method (4M), suppliers strive to develop more advanced production planning and control regimes for semiconductor production. Batching decisions often dramatically influence the overall performance of wafer fabs in terms of capacity utilization, due date compliance, cycle time and variability. To optimize such processes, we present an integrated testbed for batch formation optimization. Using a simulation of multiple semiconductor work centers, we explore how to optimize work in progress (WIP) flow with a continuous real-time scheduler and previously published batch formation heuristics. The proposed solver is designed to only optimize capacity-limited operations. By considering real-world operations requirements and semiconductor process specifics such as qualification criteria and re-entrance in our model, we demonstrate how to realize significant throughput gains. We explore and demonstrate the developed digital twin through a powerful BI frontend for historical analysis and real-time shop floor monitoring

Cycle Time Analysis For Photolithography Tools In Semiconductor Manufacturing Industry With Simulation Model : A Case Study [TR940. S618 2008 f rb].

Perkembangan industri semikonduktor dalam bidang fabrikasi biasanya melibatkan kos pelaburan yang tinggi terutamanya dalam alatan photolithography. The industry of semiconductor wafer fabrication (“fab”) has invested a huge amount of capital on the manufacturing equipments particular in photolithograph

Comparison of simulation-based schedule generation methodologies for semiconductor manufacturing

Although a number of approaches have been developed to schedule tasks or jobs in many different manufacturing environments, increasing manufacturing complexity continues to motivate the need for additional scheduling heuristic research and development. This is particularly true for semiconductor manufacturing operations, arguably the most complex manufacturing environment in existence. Simulation-based scheduling has shown recent promise as a means for developing schedules for dynamic, stochastic manufacturing environments. I investigate the potential advantages and drawbacks of using simulation-based scheduling in a complex job shop as motivated by a semiconductor wafer fab

Analysis of production control methods for semiconductor research and development fabs using simulation

The importance of semiconductor device fabrication has been rising steadily over many years. Integrated circuit technology and innovation depends on successful research and development (R&D). R&D establishes the direction for prevailing technology in electronics and computers. To be a leader in the semiconductor industry, a company must bring technology to the market as soon as its application is deemed feasible. Using suitable production control methods for wafer fabrication in R&D fabs ensures reduction in cycle times and planned inventories, which in turn help to more quickly, transfer the new technology to the production fabs, where products are made on a commercial scale. This helps to minimize the time to market. The complex behavior of research fabs produces varying results when conventional production control methodologies are applied. Simulation modeling allows the study of the behavior of the research fab by providing statistical reports on performance measures. The goal of this research is to investigate production control methods in semiconductor R&D fabs. A representative R&D fab is modeled, where an appropriate production load is applied to the fab by using a representative product load. Simulation models are run with different levels of production volume, lot priorities, primary and secondary dispatching strategies and due date tightness as treatment combinations in a formally designed experiment. Fab performance is evaluated based on four performance measures, which include percent on time delivery, average cycle time, standard deviation of cycle time and average work-in-process. Statistical analyses are used to determine the best performing dispatching rules for given fab operating scenarios. Results indicate that the optimal combination of dispatching rules is dependent on specific fab characteristics. However, several dispatching rules are found to be robust across performance measures. A simulation study of the Semiconductor & Microsystems Fabrication Laboratory (SMFL) at the Rochester Institute of Technology (RIT) is used to verify the results

Entwicklung und Einführung von Produktionssteuerungsverbesserungen für die kundenorientierte Halbleiterfertigung

Production control in a semiconductor production facility is a very complex and timeconsuming task. Different demands regarding facility performance parameters are defined by customer and facility management. These requirements are usually opponents, and an efficient strategy is not simple to define. In semiconductor manufacturing, the available production control systems often use priorities to define the importance of each production lot. The production lots are ranked according to the defined priorities. This process is called dispatching. The priority allocation is carried out by special algorithms. In literature, a huge variety of different strategies and rules is available. For the semiconductor foundry business, there is a need for a very flexible and adaptable policy taking the facility state and the defined requirements into account. At our case the production processes are characterized by a low-volume high-mix product portfolio. This portfolio causes additional stability problems and performance lags. The unstable characteristic increases the influence of reasonable production control logic. This thesis offers a very flexible and adaptable production control policy. This policy is based on a detailed facility model with real-life production data. The data is extracted from a real high-mix low-volume semiconductor facility. The dispatching strategy combines several dispatching rules. Different requirements like line balance, throughput optimization and on-time delivery targets can be taken into account. An automated detailed facility model calculates a semi-optimal combination of the different dispatching rules under a defined objective function. The objective function includes different demands from the management and the customer. The optimization is realized by a genetic heuristic for a fast and efficient finding of a close-to-optimal solution. The strategy is evaluated with real-life production data. The analysis with the detailed facility model of this fab shows an average improvement of 5% to 8% for several facility performance parameters like cycle time per mask layer. Finally the approach is realized and applied at a typical high-mix low-volume semiconductor facility. The system realization bases on a JAVA implementation. This implementation includes common state-of-the-art technologies such as web services. The system replaces the older production control solution. Besides the dispatching algorithm, the production policy includes the possibility to skip several metrology operations under defined boundary conditions. In a real-life production process, not all metrology operations are necessary for each lot. The thesis evaluates the influence of the sampling mechanism to the production process. The solution is included into the system implementation as a framework to assign different sampling rules to different metrology operations. Evaluations show greater improvements at bottleneck situations. After the productive introduction and usage of both systems, the practical results are evaluated. The staff survey offers good acceptance and response to the system. Furthermore positive effects on the performance measures are visible. The implemented system became part of the daily tools of a real semiconductor facility.Produktionssteuerung im Bereich der kundenorientierten Halbleiterfertigung ist heutzutage eine sehr komplexe und zeitintensive Aufgabe. Verschiedene Anforderungen bezüglich der Fabrikperformance werden seitens der Kunden als auch des Fabrikmanagements definiert. Diese Anforderungen stehen oftmals in Konkurrenz. Dadurch ist eine effiziente Strategie zur Kompromissfindung nicht einfach zu definieren. Heutige Halbleiterfabriken mit ihren verfügbaren Produktionssteuerungssystemen nutzen oft prioritätsbasierte Lösungen zur Definition der Wichtigkeit eines jeden Produktionsloses. Anhand dieser Prioritäten werden die Produktionslose sortiert und bearbeitet. In der Literatur existiert eine große Bandbreite verschiedener Algorithmen. Im Bereich der kundenorientierten Halbleiterfertigung wird eine sehr flexible und anpassbare Strategie benötigt, die auch den aktuellen Fabrikzustand als auch die wechselnden Kundenanforderungen berücksichtigt. Dies gilt insbesondere für den hochvariablen geringvolumigen Produktionsfall. Diese Arbeit behandelt eine flexible Strategie für den hochvariablen Produktionsfall einer solchen Produktionsstätte. Der Algorithmus basiert auf einem detaillierten Fabriksimulationsmodell mit Rückgriff auf Realdaten. Neben synthetischen Testdaten wurde der Algorithmus auch anhand einer realen Fertigungsumgebung geprüft. Verschiedene Steuerungsregeln werden hierbei sinnvoll kombiniert und gewichtet. Wechselnde Anforderungen wie Linienbalance, Durchsatz oder Liefertermintreue können adressiert und optimiert werden. Mittels einer definierten Zielfunktion erlaubt die automatische Modellgenerierung eine Optimierung anhand des aktuellen Fabrikzustandes. Die Optimierung basiert auf einen genetischen Algorithmus für eine flexible und effiziente Lösungssuche. Die Strategie wurde mit Realdaten aus der Fertigung einer typischen hochvariablen geringvolumigen Halbleiterfertigung geprüft und analysiert. Die Analyse zeigt ein Verbesserungspotential von 5% bis 8% für die bekannten Performancekriterien wie Cycletime im Vergleich zu gewöhnlichen statischen Steuerungspolitiken. Eine prototypische Implementierung realisiert diesen Ansatz zur Nutzung in der realen Fabrikumgebung. Die Implementierung basiert auf der JAVA-Programmiersprache. Aktuelle Implementierungsmethoden erlauben den flexiblen Einsatz in der Produktionsumgebung. Neben der Fabriksteuerung wurde die Möglichkeit der Reduktion von Messoperationszeit (auch bekannt unter Sampling) unter gegebenen Randbedingungen einer hochvariablen geringvolumigen Fertigung untersucht und geprüft. Oftmals ist aufgrund stabiler Prozesse in der Fertigung die Messung aller Lose an einem bestimmten Produktionsschritt nicht notwendig. Diese Arbeit untersucht den Einfluss dieses gängigen Verfahrens aus der Massenfertigung für die spezielle geringvolumige Produktionsumgebung. Die Analysen zeigen insbesondere in Ausnahmesituationen wie Anlagenausfällen und Kapazitätsengpässe einen positiven Effekt, während der Einfluss unter normalen Produktionsbedingungen aufgrund der hohen Produktvariabilität als gering angesehen werden kann. Nach produktiver Einführung in einem typischen Vertreter dieser Halbleiterfabriken zeigten sich schnell positive Effekte auf die Fabrikperformance als auch eine breite Nutzerakzeptanz. Das implementierte System wurde Bestandteil der täglichen genutzten Werkzeuglandschaft an diesem Standort

Modeling, design and scheduling of computer integrated manufacturing and demanufacturing systems

This doctoral dissertation work aims to provide a discrete-event system-based methodology for design, implementation, and operation of flexible and agile manufacturing and demanufacturing systems. After a review of the current academic and industrial activities in these fields, a Virtual Production Lines (VPLs) design methodology is proposed to facilitate a Manufacturing Execution System integrated with a shop floor system. A case study on a back-end semiconductor line is performed to demonstrate that the proposed methodology is effective to increase system throughput and decrease tardiness. An adaptive algorithm is proposed to deal with the machine failure and maintenance. To minimize the environmental impacts caused by end-of-life or faulty products, this research addresses the fundamental design and implementation issues of an integrated flexible demanufacturing system (IFDS). In virtue of the success of the VPL design and differences between disassembly and assembly, a systematic approach is developed for disassembly line design. This thesis presents a novel disassembly planning and demanufacturing scheduling method for such a system. Case studies on the disassembly of personal computers are performed illustrating how the proposed approaches work

반도체 공장 내 일시적인 생산 용량 확장 정책 제안

학위논문 (석사) -- 서울대학교 대학원 : 공과대학 산업공학과, 2021. 2. 박건수.Due to the instability of the capacity of the semiconductor process, there are cases in which the production capacity temporarily becomes insufficient compared to the capacity allocated by the initial plan. To respond, production managers require capacity to other lines with compatible equipment. This decision can have an adverse effect on the entire line because the processes are connected in a sequence. In particular, it becomes more problematic when the machine group is a bottleneck process group. Therefore, this study proposes a capacity expansion policy learned by reinforcement learning algorithms in this environment using a FAB simulator built upon a WIP balancing scheduler and a machine disruption model. These policies performed better than policies imitating human decision in terms of throughput and machine efficiency.반도체공장은 설비 용량의 불안정성 때문에 초기 계획하여 할당된 설비 용량에 비해 일시적으로 생산 용량이 부족해지는 경우가 발생한다. 이를 대응하기 위해 생산 담당자들은 다른 라인에 호환가능한 설비를 공유하는 것을 요청하는데, 가능한 많은 양의 WIP에 대한 요청을 한다. 이러한 의사결정은 공정이 순차적으로 연결된 점 때문에 라인 전체 측면에서는 오히려 WIP Balancing을 악화시킬 수 있다. 특히 해당 공정군이 병목공정군인 경우 더 문제가 된다. 따라서 본 연구에서는 병목공정군을 중심으로 한 WIP Balancing scheduler를 이용하여 FAB simulator를 만든 뒤 이러한 환경속에서 강화학습 알고리즘으로 학습한 생산 용량 확장 정책을 제안한다. 이러한 정책은 throughput, machine efficiency 측면에서 사람의 의사결정을 모방한 정책보다 좋은 성과를 보였다.Abstract i Contents ii List of Tables iv List of Figures v Chapter 1 Introduction 1 1.1 Problem Description 3 1.2 Research Motivation and Contribution 5 1.3 Organization of the Thesis 5 Chapter 2 Literature Review 6 2.1 Review on FAB scheduling 6 2.2 Review on Dynamic production control 7 Chapter 3 Proposed Approach and Methodology 8 3.1 Proposed Approach 8 3.2 FAB Simulator 17 3.3 Reinforcement Learning Approach 26 Chapter 4 Computational Experiments 30 4.1 Experiment settings 30 4.2 Test Instances 31 4.3 Test Results 33 Chapter 5 Conclusions 37 Bibliography 38 국문초록 39Maste

Simulation-Based Analysis on Operational Control of Batch Processors in Wafer Fabrication

[EN] In semiconductor wafer fabrication (wafer fab), wafers go through hundreds of process steps on a variety of processing machines for electrical circuit building operations. One of the special features in the wafer fabs is that there exist batch processors (BPs) where several wafer lots are processed at the same time as a batch. The batch processors have a significant influence on system performance because the repetitive batching and de-batching activities in a reentrant product flow system lead to non-smooth product flows with high variability. Existing research on the BP control problems has mostly focused on the local performance, such as waiting time at the BP stations. This paper attempts to examine how much BP control policies affect the system-wide behavior of the wafer fabs. A simulation model is constructed with which experiments are performed to analyze the performance of BP control rules under various production environments. Some meaningful insights on BP control decisions are identified through simulation results.This work was supported by the Pukyong National University Research Abroad Fund (C-D-2016-0843).Koo, P.; Ruiz García, R. (2020). Simulation-Based Analysis on Operational Control of Batch Processors in Wafer Fabrication. Applied Sciences. 10(17):1-17. https://doi.org/10.3390/app10175936S1171017Wang, L.-C., Chu, P.-C., & Lin, S.-Y. (2019). Impact of capacity fluctuation on throughput performance for semiconductor wafer fabrication. Robotics and Computer-Integrated Manufacturing, 55, 208-216. doi:10.1016/j.rcim.2018.03.005Ham, M. (2012). Integer programming-based real-time dispatching (i-RTD) heuristic for wet-etch station at wafer fabrication. International Journal of Production Research, 50(10), 2809-2822. doi:10.1080/00207543.2011.594816Mathirajan, M., & Sivakumar, A. I. (2006). A literature review, classification and simple meta-analysis on scheduling of batch processors in semiconductor. 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