Joint Time-and Event-Triggered Scheduling in the Linux Kernel

There is increasing interest in using Linux in the real-time domain due to the emergence of cloud and edge computing, the need to decrease costs, and the growing number of complex functional and non-functional requirements of real-time applications. Linux presents a valuable opportunity as it has rich hardware support, an open-source development model, a well-established programming environment, and avoids vendor lock-in. Although Linux was initially developed as a general-purpose operating system, some real-time capabilities have been added to the kernel over many years to increase its predictability and reduce its scheduling latency. Unfortunately, Linux currently has no support for time-triggered (TT) scheduling, which is widely used in the safety-critical domain for its determinism, low run-time scheduling latency, and strong isolation properties. We present an enhancement of the Linux scheduler as a new low-overhead TT scheduling class to support offline table-driven scheduling of tasks on multicore Linux nodes. Inspired by the Slot shifting algorithm, we complement the new scheduling class with a low overhead slot shifting manager running on a non-time-triggered core to provide guaranteed execution time to real-time aperiodic tasks by using the slack of the time-triggered tasks and avoiding high-overhead table regeneration for adding new periodic tasks. Furthermore, we evaluate our implementation on server-grade hardware with Intel Xeon Scalable Processor.Comment: to appear in Operating Systems Platforms for Embedded Real-Time applications (OSPERT) workshop 2023 co-hosted with 35th Euromicro conference on Real-time system

Combining Time-Triggered Plans with Priority Scheduled Task Sets

The final publication is available at Springer via http://dx.doi.org/10.1007/978-3-319-39083-3_13Time-triggered and concurrent priority-based scheduling are the two major approaches in use for real-time and embedded systems. Both approaches have their own advantages and drawbacks. On the one hand, priority-based systems facilitate separation of concerns between functional and timing requirements by relying on an underlying real- time operating system that takes all scheduling decisions at run time. But this is at the cost of indeterminism in the exact timing pattern of execution of activities, namely variable release jitter. On the other hand, time-triggered schedules are more intricate to design since all schedul- ing decisions must be taken beforehand in the design phase, but their advantage is determinism and more chances for minimisation of release jitter. In this paper we propose a software architecture that enables the combined and controlled execution of time-triggered plans and priority- scheduled tasks. We also describe the implementation of an Ada library supporting it. Our aim is to take advantage of the best of both ap- proaches by providing jitter-controlled execution of time-triggered tasks (e.g., control tasks), coexisting with a set of priority-scheduled tasks, with less demanding jitter requirements.This work has been partly supported by the Spanish Government’s project M2C2 (TIN2014-56158-C4-1-P-AR) and the European Commission’s project EMC2 (ARTEMIS-JU Call 2013 AIPP-5, Contract 621429).Real Sáez, JV.; Sáez Barona, S.; Crespo, A. (2016). Combining Time-Triggered Plans with Priority Scheduled Task Sets. En Reliable Software Technologies – Ada-Europe 2016. Springer. 195-212. https://doi.org/10.1007/978-3-319-39083-3_13S195212Liu, C., Layland, J.: Scheduling algorithms for multiprogramming in a hard real-time environment. J. ACM 20(1), 46–61 (1973)Martí, P., Fuertes, J., Fohler, G.: Jitter compensation for real-time control systems. In: Real-Time Systems Symposium (2001)Dobrin, R.: Combining off-line schedule construction and fixed priority scheduling in real-time computer systems. Ph.D. thesis. Mälardalen University (2005)Cervin, A.: Integrated control and real-time scheduling. Ph.D. thesis. Lund Institute of Technology, April 2003Balbastre, P., Ripoll, I., Vidal, J., Crespo, A.: A task model to reduce control delays. Real-Time Syst. 27(3), 215–236 (2004)Hong, S., Hu, X., Lemmon, M.: Reducing delay jitter of real-time control tasks through adaptive deadline adjustments. In: 22nd Euromicro Conference on Real-Time Systems - ECRTS, pp. 229–238. IEEE Computer Society (2010)ISO/IEC-JTC1-SC22-WG9: Ada Reference Manual ISO/IEC 8652:2012(E) (2012). http://www.ada-europe.org/manuals/LRM-2012.pdfBaker, T.P., Shaw, A.: The cyclic executive model and Ada. In: Proceedings IEEE Real Time Systems Symposium 1988, Huntsville, Alabama, pp. 120–129 (1988)Liu, J.W.S.: Real-Time Systems. Prentice-Hall Inc., Upper Saddle River (2000)Pont, M.J.: The Engineering of Reliable Embedded Systems: LPC1769. SafeTTy Systems Limited, Skelmersdale (2014). ISBN: 978-0-9930355-0-0Aldea Rivas, M., González Harbour, M.: MaRTE OS: an Ada kernel for real-time embedded applications. In: Strohmeier, A., Craeynest, D. (eds.) Ada-Europe 2001. LNCS, vol. 2043, pp. 305–316. Springer, Heidelberg (2001)Palencia, J., González-Harbour, M.: Schedulability analysis for tasks with static and dynamic offsets. In: 9th IEEE Real-Time Systems Symposium (1998)Wellings, A.J., Burns, A.: A framework for real-time utilities for Ada 2005. Ada Lett. XXVI XXVII(2), 41–47 (2007)Real, J., Crespo, A.: Incorporating operating modes to an Ada real-time framework. Ada Lett. 30(1), 73–85 (2010)Sáez, S., Terrasa, S., Crespo, A.: A real-time framework for multiprocessor platforms using Ada 2012. In: Romanovsky, A., Vardanega, T. (eds.) Ada-Europe 2011. LNCS, vol. 6652, pp. 46–60. Springer, Heidelberg (2011

Combined Scheduling of Time-Triggered Plans and Priority Scheduled Task Sets

© Owner/Author (2016). This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in ACM SIGAda Ada Letters, 36(1), 68-76, http://dx.doi.org/10.1145/10.1145/2971571.2971580.[EN] Preemptive, priority-based scheduling on the one hand, and time-triggered scheduling on the other, are the two major techniques in use for development of real-time and embedded software. Both have their advantages and drawbacks with respect to the other, and are commonly adopted in mutual exclusion. In a previous paper, we proposed a software architecture that enables the combined and controlled execution of time-triggered plans and priority-scheduled tasks. The goal was to take advantage of the best of both approaches by providing deterministic, jitter-controlled execution of time-triggered tasks (e.g., control tasks), coexisting with a set of priority-scheduled tasks, with less demanding jitter requirements. In this paper, we briefly describe the approach, in which the time-triggered plan is executed at the highest priority level, controlled by scheduling decisions taken only at particular points in time, signalled by recurrent timing events. The rest of priority levels are used by a set of concurrent tasks scheduled by static or dynamic priorities. We also discuss several open issues such as schedulability analysis, use of the approach in multiprocessor architectures, usability in mixed-criticality systems and needed changes to make this approach Ravenscar compliant.This work has been partly supported by the Spanish Government’s project M2C2 (TIN2014-56158-C4-1-P-AR) and the European Commission’s project EMC2 (ARTEMIS-JU Call 2013 AIPP-5, Contract 621429).Real Sáez, JV.; Sáez Barona, S.; Crespo Lorente, A. (2016). Combined Scheduling of Time-Triggered Plans and Priority Scheduled Task Sets. Ada Letters. 36(1):68-76. https://doi.org/10.1145/2971571.2971580S6876361T. P. Baker and A. Shaw. The cyclic executive model and Ada. In Proceedings IEEE Real Time Systems Symposium 1988, Huntsville, Alabama, pages 120--129, 1988.P. Balbastre, I. Ripoll, J. Vidal, and A. Crespo. A Task Model to Reduce Control Delays. Real-Time Systems, 27(3):215--236, September 2004.A. Burns and R. Davis. Mixed Criticality Systems - A Review. Technical report, Depatment of Computer Science, University of York, 2013.A. Cervin. Integrated Control and Real-Time Scheduling. PhD thesis, Lund Institute of Technology, April 2003.R. Dobrin. Combining Offline Schedule Construction and Fixed Priority Scheduling in Real-Time Computer Systems. PhD thesis, Mälardalen University, 2005.S. Hong, X. Hu, and M. Lemmon. Reducing Delay Jitter of Real-Time Control Tasks through Adaptive Deadline Adjustments. In IEEE Computer Society, editor, 22nd Euromicro Conference on Real-Time Systems -- ECRTS, pages 229--238, 2010.J. W. S. Liu. Real-Time Systems. Prentice-Hall Inc., 2000.J. Palencia and M. González-Harbour. Schedulability Analysis for Tasks with Static and Dynamic Offsets. In 9th IEEE Real-Time Systems Symposium, 1998.M. J. Pont. The Engineering of Reliable Embedded Systems: LPC1769 edition. Number ISBN: 978-0-9930355-0-0. SafeTTy Systems Limited, 2014.J. Real and A. Crespo. Incorporating Operating Modes to an Ada Real-Time Framework. Ada Letters, 30(1):73--85, April 2010.J. Real, S. Sáez, and A. Crespo. Combining time-triggered plans with priority scheduled task sets. In M. Bertogna and L. M. Pinho, editors, Reliable Software Technologies -- Ada-Europe 2016, volume 9695 of Lecture Notes in Computer Science. Springer, June 2016.S. Sáez, J. Real, and A. Crespo. An integrated framework for multiprocessor, multimoded real-time applications. In M. Brorsson and L. Pinho, editors, Reliable Software Technologies -- Ada-Europe 2012, volume 7308, pages 18--34. Springer-Verlag, June 2012.S. Sáez, J. Real, and A. Crespo. Implementation of Timing-Event Anities in Ada/Linux. Ada Letters, 35(1), April 2015.A. J. Wellings and A. Burns. A Framework for Real-Time Utilities for Ada 2005. Ada Letters, XXVII(2), August 2007

Scheduling event-triggered and time-triggered applications with optimal reliability and predictability on networked multi-core chips

Multi-core processors are gaining increasing importance in safety-relevant embedded realtime systems, where temporal guarantees must be ensured despite the sharing of on-chip resources such as processor cores and networks-on-chip (NoC). At the same time, many applications comprise workloads with different timing models including time triggered and event-triggered communication. The first contribution is a scheduling model based on Mixed Integer Linear Programming(MILP) supporting the allocation of computational jobs to processing cores as well as the scheduling of messages and the selection of paths on NoC. The model supports dependencies between computational jobs and it combines both time-triggered and event-triggered messages. Phase alignment of time-triggered messages is performed while avoiding collisions between time-triggered messages and satisfying bandwidth constraints for event-triggered messages. Example scenarios are solved optimally using the IBM CPLEX optimizer yielding minimal computational and communication latencies. Real-time communication and reliability are two important requirements in the development of safety-critical embedded systems, which benefit from the inherent fault isolation and temporal predictability of time-triggered networks. These systems depend on redundant communication schedules that contain global time-based information of message transmissions with conflict-free paths through the switches. In these systems, the use of redundancy to handle communication errors requires the preallocation of communication resources. The second contribution introduces a novel scheduler for redundant time-triggered networks that assigns messages to redundant paths. The scheduler considers the link reliability along with physical and logical models and produces a schedule where each message is assigned to two different paths along the switches. We also discuss and validate the approach with results from a prototype implementation. SoS consist of complex interconnections of large numbers of networked embedded systems that are characterized by operational and managerial independence of constituent systems, geographical separation, and emergent behavior in a constantly changing environment. The support for real-time communication is crucial for many SoS application areas such as medical, business, and military systems. The third contribution is a conceptual model and a scheduling algorithm for supporting real-time requirements in SoS. The search for a feasible schedule is computed incrementally upon the introduction of new applications in the SoS. The distributed computation of the schedule using the different constituent systems considers the lack of global knowledge and control in the SoS, while also reducing the overall scheduling time. Concurrent scheduling activities are supported to deal with the uncoordinated and possibly simultaneous introduction of multiple applications. The dissertation introduces also a simulation framework with real-time support of SoS that supports high-level scheduling as well as low-level scheduling for each constituent system. A time-triggered Ethernet (TTEthernet) simulation framework was extended by adding a scheduler layer to perform incremental scheduling among Constituent System Managers (CSMs). The simulation framework enabled the evaluation of the proposed algorithms in terms of schedulability, run-time, and worst-case latency for time-triggered and rate-constrained messages.Mehrkernprozessoren gewinnen zunehmend an Bedeutung in sicherheitsrelevanten eingebetteten Echtzeitsystemen, bei denen trotz der gemeinsamen Nutzung von On-Chip-Ressourcen wie Prozessorkernen und On-Chip-Netzwerken zeitliche Garantien gewährleistet sein müssen. Gleichzeitig umfassen viele Anwendungen Arbeitsbelastungen mit unterschiedlichen Timing- Modellen, einschließlich zeitgesteuerter und ereignisgesteuerter Kommunikation. Der erste Beitrag der Dissertation ist ein Planungsmodell, das auf der gemischt-ganzzahligen linearen Programmierung basiert und die Zuweisung von Rechenaufträgen an Prozessorkerne sowie die Planung von Nachrichten und die Auswahl von Wegen auf NoCs unterstützt. Das Modell unterstützt Abhängigkeiten zwischen Rechenjobs und kombiniert sowohl zeitgesteuerte als auch ereignisgesteuerte Nachrichten. Die Phasenausrichtung zeitgesteuerter Nachrichten wird durchgeführt, während Kollisionen zwischen zeitgesteuerten Nachrichten und die Verletzung von Bandbreitenbeschränkungen für ereignisgesteuerte Nachrichten vermieden werden. Beispielszenarien werden optimal mit dem IBM CPLEX-Optimierer gelöst, wobei minimale Rechen- und Kommunikationslatenzen garantiert werden. Echtzeitkommunikation und Zuverlässigkeit sind zwei wichtige Anforderungen bei der Entwicklung sicherheitskritischer eingebetteter Systeme, die von der inhärenten Fehlerisolierung und zeitlichen Vorhersagbarkeit zeitgesteuerter Netzwerke profitieren. Als Grundlage für Fehlertoleranz benötigen diese Systeme außerdem redundante Kommunikationspläne, die globale zeitbasierte Informationen von mehrfachen Nachrichtenübertragungen mit konfliktfreien Pfaden durch die Switches enthalten. In diesen Systemen erfordert die Verwendung von Redundanz zur Behandlung von Kommunikationsfehlern die Vorbelegung von Kommunikationsressourcen. Der zweite Beitrag der Dissertation stellt einen neuartigen Scheduler für redundante zeitgesteuerte Netzwerke vor, der Nachrichten redundanten Pfaden zuweist. Der Scheduler berücksichtigt die Verbindungszuverlässigkeit zusammen mit physischen und logischen Modellen und erstellt einen Zeitplan, bei dem jede Nachricht zwei verschiedenen Pfaden entlang der Switches zugewiesen wird. Wir diskutieren und validieren den Ansatz mit den Ergebnissen einer Prototypimplementierung. Systeme von Systemen (SoS) bestehen aus komplexen Zusammenschaltungen einer großen Anzahl von vernetzten eingebetteten Systemen, die durch betriebliche Unabhängigkeit von Teilsystemen, geografische Trennung und emergentes Verhalten in einer sich ständig verändernden Umgebung gekennzeichnet sind. Die Unterstützung für Echtzeitkommunikation ist für viele Anwendungsbereiche wie medizinische, geschäftliche und militärische Systeme von entscheidender Bedeutung. Der dritte Beitrag der Dissertation ist ein konzeptionelles Modell und ein Planungsalgorithmus zur Unterstützung von Echtzeitanforderungen in SoS. Die Suche nach einem realisierbaren Zeitplan wird schrittweise nach der Einführung neuer Anwendungen im SoS berechnet. Die verteilte Berechnung des Zeitplans unter Verwendung der verschiedenen Teilsysteme berücksichtigt den Mangel an globalem Wissen und Kontrolle im SoS, während gleichzeitig die Gesamtplanungszeit verringert wird. Gleichzeitige Terminierungsaktivitäten werden unterstützt, um die unkoordinierte und möglicherweise gleichzeitige Einführung mehrerer Anwendungen zu bewältigen. Die Dissertation stellt auch ein Simulationsframework mit Echtzeit-Unterstützung von SoS vor, das sowohl die High-Level-Planung als auch die Low-Level-Planung für jedes Teilsystem unterstützt. Ein Simulationsframework für zeitgesteuertes Ethernet (TTEthernet) wurde um eine Scheduler-Schicht erweitert, um eine inkrementelle Planung unter Constituent System Managern (CSMs) durchzuführen. Das Simulationsframework ermöglichte die Evaluierung der vorgeschlagenen Algorithmen hinsichtlich der Planbarkeit, der Laufzeit und der Worst-Case-Latenz für zeitgesteuerte und ratenbeschränkte Nachrichten

From Dataflow Specification to Multiprocessor Partitioned Time-triggered Real-time Implementation *

International audienceOur objective is to facilitate the development of complex time-triggered systems by automating the allocation and scheduling steps. We show that full automation is possible while taking into account the elements of complexity needed by a complex embedded control system. More precisely, we consider deterministic functional specifications provided (as often in an industrial setting) by means of synchronous data-flow models with multiple modes and multiple relative periods. We first extend this functional model with an original real-time characterization that takes advantage of our time-triggered framework to provide a simpler representation of complex end-to-end flow requirements. We also extend our specifications with additional non-functional properties specifying partitioning, allocation , and preemptability constraints. Then, weprovide novel algorithms for the off-line scheduling of these extended specifications onto partitioned time-triggered architectures à la ARINC 653. The main originality of our work is that it takes into account at the same time multiple complexity elements: various types of non-functional properties (real-time, partitioning, allocation, preemptability) and functional specifications with conditional execution and multiple modes. Allocation of time slots/windows to partitions can be fullyor partially provided, or synthesized by our tool. Our algorithms allow the automatic allocation and scheduling onto multi-processor (distributed) sys-tems with a global time base, taking into account communication costs. We demonstrate our technique on a model of space flight software systemwith strong real-time determinism requirements

A Time-Triggered Constraint-Based Calculus for Avionic Systems

The Integrated Modular Avionics (IMA) architec- ture and the Time-Triggered Ethernet (TTEthernet) network have emerged as the key components of a typical architecture model for recent civil aircrafts. We propose a real-time constraint-based calculus targeted at the analysis of such concepts of avionic embedded systems. We show our framework at work on the modelisation of both the (IMA) architecture and the TTEthernet network, illustrating their behavior by the well-known Flight Management System (FMS)