18,536 research outputs found
Cluster-Based Load Balancing Algorithms for Grids
E-science applications may require huge amounts of data and high processing
power where grid infrastructures are very suitable for meeting these
requirements. The load distribution in a grid may vary leading to the
bottlenecks and overloaded sites. We describe a hierarchical dynamic load
balancing protocol for Grids. The Grid consists of clusters and each cluster is
represented by a coordinator. Each coordinator first attempts to balance the
load in its cluster and if this fails, communicates with the other coordinators
to perform transfer or reception of load. This process is repeated
periodically. We analyze the correctness, performance and scalability of the
proposed protocol and show from the simulation results that our algorithm
balances the load by decreasing the number of high loaded nodes in a grid
environment.Comment: 17 pages, 11 figures; International Journal of Computer Networks,
volume3, number 5, 201
Recommended from our members
Computer-aided programming for multiprocessing systems
As both the number of processors and the complexity of problems to be solved increase, programming multiprocessing systems becomes more difficult and error-prone. This report discusses parallel models of computation and tools for computer-aided programming (CAP). Program development tools are necessary since programmers are not able to develop complex parallel programs efficiently. In particular, a CAP tool, named Hypertool, is described here. It performs scheduling and handles the communication primitive insertion automatically so that many errors are eliminated. It also generates the performance estimates and other program quality measures to help programmers in improving their algorithms and programs. Experiments have shown that up to a 300% performance improvement can be achieved by computer-aided programming
Performance Models for Data Transfers: A Case Study with Molecular Chemistry Kernels
With increasing complexity of hardwares, systems with different memory nodes
are ubiquitous in High Performance Computing (HPC). It is paramount to develop
strategies to overlap the data transfers between memory nodes with computations
in order to exploit the full potential of these systems. In this article, we
consider the problem of deciding the order of data transfers between two memory
nodes for a set of independent tasks with the objective to minimize the
makespan. We prove that with limited memory capacity, obtaining the optimal
order of data transfers is a NP-complete problem. We propose several heuristics
for this problem and provide details about their favorable situations. We
present an analysis of our heuristics on traces, obtained by running 2
molecular chemistry kernels, namely, Hartree-Fock (HF) and Coupled Cluster
Single Double (CCSD) on 10 nodes of an HPC system. Our results show that some
of our heuristics achieve significant overlap for moderate memory capacities
and are very close to the lower bound of makespan
Low Power system Design techniques for mobile computers
Portable products are being used increasingly. Because these systems are battery powered, reducing power consumption is vital. In this report we give the properties of low power design and techniques to exploit them on the architecture of the system. We focus on: min imizing capacitance, avoiding unnecessary and wasteful activity, and reducing voltage and frequency. We review energy reduction techniques in the architecture and design of a hand-held computer and the wireless communication system, including error control, sys tem decomposition, communication and MAC protocols, and low power short range net works
Cosmological Simulations on a Grid of Computers
The work presented in this paper aims at restricting the input parameter
values of the semi-analytical model used in GALICS and MOMAF, so as to derive
which parameters influence the most the results, e.g., star formation, feedback
and halo recycling efficiencies, etc. Our approach is to proceed empirically:
we run lots of simulations and derive the correct ranges of values. The
computation time needed is so large, that we need to run on a grid of
computers. Hence, we model GALICS and MOMAF execution time and output files
size, and run the simulation using a grid middleware: DIET. All the complexity
of accessing resources, scheduling simulations and managing data is harnessed
by DIET and hidden behind a web portal accessible to the users.Comment: Accepted and Published in AIP Conference Proceedings 1241, 2010,
pages 816-82
Design techniques for low-power systems
Portable products are being used increasingly. Because these systems are battery powered, reducing power consumption is vital. In this report we give the properties of low-power design and techniques to exploit them on the architecture of the system. We focus on: minimizing capacitance, avoiding unnecessary and wasteful activity, and reducing voltage and frequency. We review energy reduction techniques in the architecture and design of a hand-held computer and the wireless communication system including error control, system decomposition, communication and MAC protocols, and low-power short range networks
Performance analysis of parallel branch and bound search with the hypercube architecture
With the availability of commercial parallel computers, researchers are examining new classes of problems which might benefit from parallel computing. This paper presents results of an investigation of the class of search intensive problems. The specific problem discussed is the Least-Cost Branch and Bound search method of deadline job scheduling. The object-oriented design methodology was used to map the problem into a parallel solution. While the initial design was good for a prototype, the best performance resulted from fine-tuning the algorithm for a specific computer. The experiments analyze the computation time, the speed up over a VAX 11/785, and the load balance of the problem when using loosely coupled multiprocessor system based on the hypercube architecture
The Impact of Data Replicatino on Job Scheduling Performance in Hierarchical data Grid
In data-intensive applications data transfer is a primary cause of job
execution delay. Data access time depends on bandwidth. The major bottleneck to
supporting fast data access in Grids is the high latencies of Wide Area
Networks and Internet. Effective scheduling can reduce the amount of data
transferred across the internet by dispatching a job to where the needed data
are present. Another solution is to use a data replication mechanism. Objective
of dynamic replica strategies is reducing file access time which leads to
reducing job runtime. In this paper we develop a job scheduling policy and a
dynamic data replication strategy, called HRS (Hierarchical Replication
Strategy), to improve the data access efficiencies. We study our approach and
evaluate it through simulation. The results show that our algorithm has
improved 12% over the current strategies.Comment: 11 pages, 7 figure
- âŠ