LEGION-based image segmentation by means of spiking neural networks using normalized synaptic weights implemented on a compact scalable neuromorphic architecture

© . This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/LEGION (Locally Excitatory, Globally Inhibitory Oscillator Network) topology has demonstrated good capabilities in scene segmentation applications. However, the implementation of LEGION algorithm requires machines with high performance to process a set of complex differential equations limiting its use in practical real-time applications. Recently, several authors have proposed alternative methods based on spiking neural networks (SNN) to create oscillatory neural networks with low computational complexity and highly feasible to be implemented on digital hardware to perform adaptive segmentation of images. Nevertheless, existing SNN with LEGION configuration focus on the membrane model leaving aside the behavior of the synapses although they play an important role in the synchronization of several segments by self-adapting their weights. In this work, we propose a SNN-LEGION configuration along with normalized weight of the synapses to self-adapt the SNN network to synchronize several segments of any size and shape at the same time. The proposed SNN-LEGION method involves a global inhibitor, which is in charge of performing the segmentation process between different objects with different sizes and shapes on time. To validate the proposal, the SNN-LEGION method is implemented on an optimized scalable neuromorphic architecture. Our preliminary results demonstrate that the proposed normalization process of the synaptic weights along with the SNN-LEGION configuration keep the capacity of the LEGION network to separate the segments on time, which can be useful in video processing applications such as vision processing systems for mobile robots, offering lower computational complexity and area consumption compared with previously reported solutions.The authors would like to thank the Consejo Nacional de Ciencia y Tecnologia (CONACyT) and the IPN for the financial support to realize this work under project SIP-20180251. This work was also supported in part by the Spanish Ministry of Science and Innovation and the European Social Fund (ESF) under Projects TEC2011-27047 and TEC2015-67278-R.Peer ReviewedPostprint (author's final draft

Image Segmentation Using Frequency Locking of Coupled Oscillators

Synchronization of coupled oscillators is observed at multiple levels of neural systems, and has been shown to play an important function in visual perception. We propose a computing system based on locally coupled oscillator networks for image segmentation. The system can serve as the preprocessing front-end of an image processing pipeline where the common frequencies of clusters of oscillators reflect the segmentation results. To demonstrate the feasibility of our design, the system is simulated and tested on a human face image dataset and its performance is compared with traditional intensity threshold based algorithms. Our system shows both better performance and higher noise tolerance than traditional methods.Comment: 7 pages, 14 figures, the 51th Design Automation Conference 2014, Work in Progress Poster Sessio

Accurate and energy-efficient classification with spiking random neural network: corrected and expanded version

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The paper presents test procedures designed for application-specific integrated circuit (ASIC) CMOS VLSI chip that implements a synchronized oscillator neural network with a matrix size of 32×32 for object detecting in binary images. Networks of synchronized oscillators are recently developed tool for image segmentation and analysis. This paper briefly introduces synchronized oscillators network. Basic chip analog building blocks with their test procedures and measurements results are presented. In order to do measurements, special basic building blocks test structures have been implemented in the chip. It let compare Spectre simulations results to measurements results. Moreover, basic chip analog building blocks measurements give precious information about their imperfections caused by MOS transistor mismatch. This information is very usable during design and improvement of a special setup for chip functional tests. Improvement of the setup is a digitally assisted analog technique. It is an idea of oscillators tuning procedure. Such setup, oscillators tuning procedure and segmentation of a sample binary image are presented

Bio-Inspired Computer Vision: Towards a Synergistic Approach of Artificial and Biological Vision

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