646 research outputs found
Programmable rate modem utilizing digital signal processing techniques
The engineering development study to follow was written to address the need for a Programmable Rate Digital Satellite Modem capable of supporting both burst and continuous transmission modes with either binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) modulation. The preferred implementation technique is an all digital one which utilizes as much digital signal processing (DSP) as possible. Here design tradeoffs in each portion of the modulator and demodulator subsystem are outlined, and viable circuit approaches which are easily repeatable, have low implementation losses and have low production costs are identified. The research involved for this study was divided into nine technical papers, each addressing a significant region of concern in a variable rate modem design. Trivial portions and basic support logic designs surrounding the nine major modem blocks were omitted. In brief, the nine topic areas were: (1) Transmit Data Filtering; (2) Transmit Clock Generation; (3) Carrier Synthesizer; (4) Receive AGC; (5) Receive Data Filtering; (6) RF Oscillator Phase Noise; (7) Receive Carrier Selectivity; (8) Carrier Recovery; and (9) Timing Recovery
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Extraction of anthropological data with ultrasound
This thesis was submitted for the degree of Doctor of Philosophy and was awarded by Brunel University.Human body scanners used to extract anthropological data have a significant drawback, the
subject is required to undress or wear tight fitting clothing. This thesis demonstrates an
ultrasonic based alternative to the current optical systems, that can potentially operate on a fully
clothed subject. To validate the concept several experiments were performed to determine the
acoustic properties of multiple garments. The results indicated that such an approach was
possible.
Beamforming is introduced as a method by which the ultrasonic scanning area can be increased,
the concept is thoroughly studied and a clear theoretical analysis is performed. Additionally,
Matlab has been used to demonstrate graphically, the results of such analysis, providing an
invaluable tool during the simulation, experimental and results stages of the thesis.
To evaluate beamfoming as a composite part of ultrasonic body imaging, a hardware solution
was necessary. During the concept phase, both FPGA and digital signal processors were
evaluated to determine their suitability for the role. An FPGA approach was finally chosen,
which allows highly parallel operation, essential to the high acquisition speeds required by some
beamforming methodologies. In addition, analogue circuitry was also designed to provide an
interface with the ultrasonic transducers, which, included variable gain amplifiers, charge
amplifiers and signal conditioning. Finally, a digital acquisition card was used to transfer data
between the FPGA and a desktop computer, on which, the sampled data was processed and
displayed in a coherent graphical manner.
The beamforming results clearly demonstrate that imaging multiple layers in air, with
ultrasound, is a viable technique for anthroplogical data collection. Furthermore, a wavelet
based method of improving the axial resolution is also proposed and demonstrated
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Assessing the Spoofing Threat: Development of a Portable GPS Civilian Spoofer
A portable civilian GPS spoofer is implemented on a digital
signal processor and used to characterize spoofing effects and develop defenses against civilian spoofing. This
work is intended to equip GNSS users and receiver manufacturers
with authentication methods that are effective
against unsophisticated spoofing attacks. The work also
serves to refine the civilian spoofing threat assessment
by demonstrating the challenges involved in mounting a
spoofing attack.Aerospace Engineering and Engineering Mechanic
Software-Defined Radio Technologies forGNSS Receivers: A Tutorial Approach to a SimpleDesign and Implementation
The field of satellite navigation has witnessed the
advent of a number of new systems and technologies: after
the landmark design and development of the Global Positioning
System (GPS), a number of new independent Global Navigation
Satellite Systems (GNSSs) were or are being
developed all over the world: Russia's GLONASS, Europe's
GALILEO, and China's BEIDOU-2, to mention a few. In this ever-changing context, the availability of reliable and flexible receivers is becoming a priority for a host of
applications, including research, commercial, civil, and military.
Flexible means here both easily upgradeable for future needs
and/or on-the-fly reprogrammable to adapt to different signal
formats. An effective approach to meet these design goals is the
software-defined radio (SDR) paradigm. In the last few years, the
availability of new processors with high computational power
enabled the development of (fully) software receivers whose
performance is comparable to or better than that of conventional
hardware devices, while providing all the advantages of a flexible
and fully configurable architecture. The aim of this tutorial paper
is surveying the issue of the general architecture and design
rules of a GNSS software receiver, through a comprehensive
discussion of some techniques and algorithms, typically applied
in simple PC-based receiver implementations
Learning-Driven Decision Mechanisms in Physical Layer: Facts, Challenges, and Remedies
Future communication systems must include extensive capabilities as they will
embrace a vast diversity of devices and applications. Conventional physical
layer decision mechanisms may not meet these requirements due to the frequent
use of impracticable and oversimplifying assumptions that lead to a trade-off
between complexity and efficiency. By utilizing past experiences,
learning-driven designs are promising solutions to present a resilient decision
mechanism and provide a quick response even under exceptional circumstances.
The corresponding design solutions should evolve following the learning-driven
paradigms that offer increased autonomy and robustness. This evolution must
take place by considering the facts of real-world systems without restraining
assumptions. This paper introduces the common assumptions in the physical layer
to highlight their discrepancies with practical systems. As a solution,
learning algorithms are examined by considering implementation steps and
challenges. Additionally, these issues are discussed through a real-time case
study that uses software-defined radio nodes, demonstrating the potential
performance improvement. A remedial perspective is presented to guide future
studies
Optimization of DSSS Receivers Using Hardware-in-the-Loop Simulations
Over the years, there has been significant interest in defining a hardware abstraction layer to facilitate code reuse in software defined radio (SDR) applications. Designers are looking for a way to enable application software to specify a waveform, configure the platform, and control digital signal processing (DSP) functions in a hardware platform in a way that insulates it from the details of realization.
This thesis presents a tool-based methodolgy for developing and optimizing a Direct Sequence Spread Spectrum (DSSS) transceiver deployed in custom hardware like Field Programmble Gate Arrays (FPGAs). The system model consists of a tranmitter which employs a quadrature phase shift keying (QPSK) modulation scheme, an additive white Gaussian noise (AWGN) channel, and a receiver whose main parts consist of an analog-to-digital converter (ADC), digital down converter (DDC), image rejection low-pass filter (LPF), carrier phase locked loop (PLL), tracking locked loop, down-sampler, spread spectrum correlators, and rectangular-to-polar converter.
The design methodology is based on a new programming model for FPGAs developed in the industry by Xilinx Inc. The Xilinx System Generator for DSP software tool provides design portability and streamlines system development by enabling engineers to create and validate a system model in Xilinx FPGAs. By providing hierarchical modeling and automatic HDL code generation for programmable devices, designs can be easily verified through hardware-in-the-loop (HIL) simulations.
HIL provides a significant increase in simulation speed which allows optimization of the receiver design with respect to the datapath size for different functional parts of the receiver. The parameterized datapath points used in the simulation are ADC resolution, DDC datapath size, LPF datapath size, correlator height, correlator datapath size, and rectangular-to-polar datapath size. These parameters are changed in the software enviornment and tested for bit error rate (BER) performance through real-time hardware simualtions. The final result presents a system design with minimum harware area occupancy relative to an acceptable BER degradation
Evolvable Smartphone-Based Point-of-Care Systems For In-Vitro Diagnostics
Recent developments in the life-science -omics disciplines, together with advances in micro and nanoscale technologies offer unprecedented opportunities to tackle some of the major healthcare challenges of our time. Lab-on-Chip technologies coupled with smart-devices in particular, constitute key enablers for the decentralization of many in-vitro medical diagnostics applications to the point-of-care, supporting the advent of a preventive and personalized medicine.
Although the technical feasibility and the potential of Lab-on-Chip/smart-device systems is repeatedly demonstrated, direct-to-consumer applications remain scarce. This thesis addresses this limitation. System evolvability is a key enabler to the adoption and long-lasting success of next generation point-of-care systems by favoring the integration of new technologies, streamlining the reengineering efforts for system upgrades and limiting the risk of premature system obsolescence. Among possible implementation strategies, platform-based design stands as a particularly suitable entry point. One necessary condition, is for change-absorbing and change-enabling mechanisms to be incorporated in the platform architecture at initial design-time. Important considerations arise as to where in Lab-on-Chip/smart-device platforms can these mechanisms be integrated, and how to implement them.
Our investigation revolves around the silicon-nanowire biological field effect transistor, a promising biosensing technology for the detection of biological analytes at ultra low concentrations. We discuss extensively the sensitivity and instrumentation requirements
set by the technology before we present the design and implementation of an evolvable smartphone-based platform capable of interfacing lab-on-chips embedding such sensors. We elaborate on the implementation of various architectural patterns throughout the platform and present how these facilitated the evolution of the system towards one accommodating for electrochemical sensing. Model-based development was undertaken throughout the engineering process. A formal SysML system model fed our evolvability assessment process. We introduce, in particular, a model-based methodology enabling the evaluation of modular scalability: the ability of a system to scale the current value of one of its specification by successively reengineering targeted system modules.
The research work presented in this thesis provides a roadmap for the development of evolvable point-of-care systems, including those targeting direct-to-consumer applications. It extends from the early identification of anticipated change, to the assessment of the ability of a system to accommodate for these changes. Our research should thus interest industrials eager not only to disrupt, but also to last in a shifting socio-technical paradigm
Shuttle/TDRSS Ku-band downlink study
Assessing the adequacy of the baseline signal design approach, developing performance specifications for the return link hardware, and performing detailed design and parameter optimization tasks was accomplished by completing five specific study tasks. The results of these tasks show that the basic signal structure design is sound and that the goals can be met. Constraints placed on return link hardware by this structure allow reasonable specifications to be written so that no extreme technical risk areas in equipment design are foreseen. A third channel can be added to the PM mode without seriously degrading the other services. The feasibility of using only a PM mode was shown to exist, however, this will require use of some digital TV transmission techniques. Each task and its results are summarized
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