Suppression of line voltage related distortion in current controlled grid connected inverters

The influence of selected control strategies on the level of low-order current harmonic distortion generated by an inverter connected to a distorted grid is investigated through a combination of theoretical and experimental studies. A detailed theoretical analysis, based on the concept of harmonic impedance, establishes the suitability of inductor current feedback versus output current feedback with respect to inverter power quality. Experimental results, obtained from a purpose-built 500-W, three-level, half-bridge inverter with an L-C-L output filter, verify the efficacy of inductor current as the feedback variable, yielding an output current total harmonic distortion (THD) some 29% lower than that achieved using output current feedback. A feed-forward grid voltage disturbance rejection scheme is proposed as a means to further reduce the level of low-order current harmonic distortion. Results obtained from an inverter with inductor current feedback and optimized feed-forward disturbance rejection show a THD of just 3% at full-load, representing an improvement of some 53% on the same inverter with output current feedback and no feed-forward compensation. Significant improvements in THD were also achieved across the entire load range. It is concluded that the use of inductor current feedback and feed-forward voltage disturbance rejection represent cost–effect mechanisms for achieving improved output current quality

Discrete-Time Mixing Receiver Architecture for RF-Sampling Software-Defined Radio

A discrete-time (DT) mixing architecture for RF-sampling receivers is presented. This architecture makes RF sampling more suitable for software-defined radio (SDR) as it achieves wideband quadrature demodulation and wideband harmonic rejection. The paper consists of two parts. In the first part, different downconversion techniques are classified and compared, leading to the definition of a DT mixing concept. The suitability of CT-mixing and RF-sampling receivers to SDR is also discussed. In the second part, we elaborate the DT-mixing architecture, which can be realized by de-multiplexing. Simulation shows a wideband 90° phase shift between I and Q outputs without systematic channel bandwidth limitation. Oversampling and harmonic rejection relaxes RF pre-filtering and reduces noise and interference folding. A proof-of-concept DT-mixing downconverter has been built in 65 nm CMOS, for 0.2 to 0.9 GHz RF band employing 8-times oversampling. It can reject 2nd to 6th harmonics by 40 dB typically and without systematic channel bandwidth limitation. Without an LNA, it achieves a gain of -0.5 to 2.5 dB, a DSB noise figure of 18 to 20 dB, an IIP3 = +10 dBm, and an IIP2 = +53 dBm, while consuming less than 19 mW including multiphase clock generation

Architecture of a network-in-the-Loop environment for characterizing AC power system behavior

This paper describes the method by which a large hardware-in-the-loop environment has been realized for three-phase ac power systems. The environment allows an entire laboratory power-network topology (generators, loads, controls, protection devices, and switches) to be placed in the loop of a large power-network simulation. The system is realized by using a realtime power-network simulator, which interacts with the hardware via the indirect control of a large synchronous generator and by measuring currents flowing from its terminals. These measured currents are injected into the simulation via current sources to close the loop. This paper describes the system architecture and, most importantly, the calibration methodologies which have been developed to overcome measurement and loop latencies. In particular, a new "phase advance" calibration removes the requirement to add unwanted components into the simulated network to compensate for loop delay. The results of early commissioning experiments are demonstrated. The present system performance limits under transient conditions (approximately 0.25 Hz/s and 30 V/s to contain peak phase-and voltage-tracking errors within 5. and 1%) are defined mainly by the controllability of the synchronous generator

Delay-Dependent Stability of Single-Loop Controlled Grid-Connected Inverters with LCL Filters

LCL filters have been widely used for grid-connected inverters. However, the problem that how time delay affects the stability of digitally controlled grid-connected inverters with LCL filters has not been fully studied. In this paper, a systematic study is carried out on the relationship between the time delay and stability of single-loop controlled grid-connected inverters that employ inverter current feedback (ICF) or grid current feedback (GCF). The ranges of time delay for system stability are analyzed and deduced in the continuous s-domain and discrete z-domain. It is shown that in the optimal range, the existence of time delay weakens the stability of the ICF loop, whereas a proper time delay is required for the GCF loop. The present work explains, for the first time, why different conclusions on the stability of ICF loop and GCF loop have been drawn in previous studies. To improve system stability, a linear predictor-based time delay reduction method is proposed for ICF, while a time delay addition method is used for GCF. A controller design method is then presented that guarantees adequate stability margins. The delay-dependent stability study is verified by simulation and experiment

Multifrequency Averaging in Power Electronic Systems

Power electronic systems have been widely used in the electrical power processing for applications with power levels ranging from less than one watt in battery-operated portable devices to more than megawatts in the converters, inverters and rectifiers of the utility power systems. These systems typically involve the passive elements such as inductors, capacitors, and resistors, the switching electronic components such as IGBTs, MOSFETS, and diodes, and other electronic circuits. Multifrequency averaging is one of the widely used modeling and simulation techniques today for the analysis and design of power electronic systems. This technique is capable of providing the average behavior as well as the ripple behavior of power electronic systems. This work begins with the extension of multifrequency averaging to represent uniformly sampled PWM converters. A new multifrequency averaging method of solving an observed issue with model stability is proposed and validated. Multifrequency averaging can also be applied to study the instability phenomenon in power electronic systems. In particular, a reduced-order multifrequency averaging method, along with a genetic algorithm based procedure, is proposed in this work to estimate the regions of attraction of power electronic converters. The performance of this method is shown by comparing the accuracy and efficiency with the existing methods. Finally, a new continuous-time multifrequency averaging method of representing discrete-time systems is proposed. The proposed method is applied to model digitally controlled PWM converters. Simulation and hardware results show that the proposed method is capable of predicting the average behavior as well as the ripple behavior of the closed-loop systems. Future research in the area of multifrequency averaging is proposed