311 research outputs found
An evolutionary approach to the use of Petri net based models: from parallel controllers to HW/SW co-design
"A workshop within the 19th International Conference on Applications and Theory of Petri Nets - ICATPN’1998"The main purpose of this article is to present how Petri Nets (PNs) have been used for hardware design at our research laboratory. We describe the use of PN models to specify synchronous parallel controllers and how PN speci cations can be extended to include the behavioural description of the data path, by using object-oriented concepts. Some hierarchical mechanisms which deal with the speci cation of complex digital systems are highlighted. It is described a design flow that includes, among others, the automatic generation of VHDL code to synthesize the control unit of the system. The use of PNs as part of a multiple-view model within an object-oriented methodology for hardware/software codesign is debated. The EDgAR-2 platform is
considered as the recon gurable target architecture for implementing the systems and its main characteristics are shown
An evolutionary approach to the use of petri net based models : from parallel controllers to Hw/Sw codesign
The main purpose of this article is to present how Petri Nets (PNs) have been
used for hardware design at our research laboratory. We describe the use of PN
models to specify synchronous parallel controllers and how PN specifications
can be extended to include the behavioural description of the data path, by using
object-oriented concepts. Some hierarchical mechanisms which deal with the
specification of complex digital systems are highlighted. It is described a design
flow that includes, among others, the automatic generation of VHDL code to synthesize
the control unit of the system. The use of PNs as part of a multiple-view
model within an object-oriented methodology for hardware/software codesign
is debated. The EDgAR-2 platform is considered as the reconfigurable target
architecture for implementing the systems and its main characteristics are shown
Reliable system design with a high degree of diagnostic procedures for embedded systems
Maintenance starts with reliable diagnostics. Programming Logic Controllers (PLCs) are often equipped with a high degree of diagnostic procedures in order to ensure that the processing unit is functioning correctly. It is vital to verify that the system with its programme is still within a 'healthy' state, otherwise a safety function is called and the system is brought into a safe state, or if possible, defect and malfunctioning components are exchanged during operation and the process can continue without shutting down the system. However, when it comes to smaller devices such as intelligent sensors, embedded controller devices with the functionality of an e.g. PID (Proportional-Integral-Derivative), predictive controller, filter or analytical algorithm, which is embedded into a FPGA or micro-controller then diagnostics and verification methods are often not considered in the way they should be. For example, if an intelligent sensor system is not able to diagnose that the sensor-head is malfunctioning, but the sensor-head still provides some data, then the smart algorithm bases its calculation on wrong data, which can cause a dangerous situation. This paper investigates and shows recent results to combine diagnostic methods for small scale devices. Several safety-related structures are considered with a high degree of diagnostic coverage. The paper presents relevant procedures and structures to increase the reliability of small devices without utilising a full scale microcontroller system
Lunar Applications in Reconfigurable Computing
NASA s Constellation Program is developing a lunar surface outpost in which reconfigurable computing will play a significant role. Reconfigurable systems provide a number of benefits over conventional software-based implementations including performance and power efficiency, while the use of standardized reconfigurable hardware provides opportunities to reduce logistical overhead. The current vision for the lunar surface architecture includes habitation, mobility, and communications systems, each of which greatly benefit from reconfigurable hardware in applications including video processing, natural feature recognition, data formatting, IP offload processing, and embedded control systems. In deploying reprogrammable hardware, considerations similar to those of software systems must be managed. There needs to be a mechanism for discovery enabling applications to locate and utilize the available resources. Also, application interfaces are needed to provide for both configuring the resources as well as transferring data between the application and the reconfigurable hardware. Each of these topics are explored in the context of deploying reconfigurable resources as an integral aspect of the lunar exploration architecture
The GENCOD project : Automated generation of Hardware code for safety critical applications on FPGA targets
International audienceGENCOD is a research project for solutions to automated generation of safe code for Field Programmable Gate Arrays (FPGA) targets. The paper will describe typical ASIC/FPGA workflow, and current implementation for airborne electronic hardware design. Major stakes in certification for airborne electronic hardware will be discussed. The next part will detail the project, the proposed workflow and the associated tools. We will present the current experimentations. Finally, the conclusion will expose advantages and drawbacks of such approach
Hardware Certification for Real-time Safety-critical Systems: State of the Art
This paper discusses issues related to the RTCA document DO-254 Design Assurance Guidance for Airborne Electronic Hardware and its consequences for hardware certification. In particular, problems related to circuits’ compliance with DO-254 in avionics and other industries are considered. Extensive literature review of the subject is given, including current views on and experiences of chip manufacturers and EDA industry with qualification of hardware design tools, including formal approaches to hardware verification. Some results of the authors’ own study on tool qualification are presented
Distributed State Machine Supervision for Long-baseline Gravitational-wave Detectors
The Laser Interferometer Gravitational-wave Observatory (LIGO) consists of
two identical yet independent, widely-separated, long-baseline
gravitational-wave detectors. Each Advanced LIGO detector consists of complex
optical-mechanical systems isolated from the ground by multiple layers of
active seismic isolation, all controlled by hundreds of fast, digital, feedback
control systems. This article describes a novel state machine-based automation
platform developed to handle the automation and supervisory control challenges
of these detectors. The platform, called \textit{Guardian}, consists of
distributed, independent, state machine automaton nodes organized
hierarchically for full detector control. User code is written in standard
Python and the platform is designed to facilitate the fast-paced development
process associated with commissioning the complicated Advanced LIGO
instruments. While developed specifically for the Advanced LIGO detectors,
Guardian is a generic state machine automation platform that is useful for
experimental control at all levels, from simple table-top setups to large-scale
multi-million dollar facilities.Comment: Version 2: 11 pages, 9 figures. Submitted to Review of Scientific
Instrument
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