cmUML - A UML based framework for formal specification of concurrent, reactive systems

Complex software systems possess concurrent and reactive behaviors requiring precise specifications prior to development. Lamport's transition axiom method is a formal specification method which combines axiomatic and operational approaches. On the other hand Unified Modeling Language (UML), a de facto industry standard visual language, lacks suitable constructs and semantics regarding concurrency aspects. Though UML includes action semantics, its higher level constructs and object semantics are inconsistent. Motivated by Lamport's approach, this paper proposes a UML based specification framework 'cmUML' ('cm' for concurrent modules) for formal specification of concurrent, reactive systems without object level diagrams and OCL. The framework integrates higher level diagrams of UML and addresses various concurrency issues including exception handling. It combines UML-RT and UML// SPT profile as the latter defines a core package for concurrency and causality. Further the framework includes the characteristic safety and liveness aspects of concurrent systems. The proposed framework is in contrast with existing approaches based on low level primitives (semaphore, monitors). The paper includes several specification examples validating the proposed framework

A graph based process model measurement framework using scheduling theory

Software development processes, as a means of ensuring software quality and productivity, have been widely accepted within the software development community; software process modeling, on the other hand, continues to be a subject of interest in the research community. Even with organizations that have achieved higher SEI maturity levels, processes are by and large described in documents and reinforced as guidelines or laws governing software development activities. The lack of industry-wide adaptation of software process modeling as part of development activities can be attributed to two major reasons: lack of forecast power in the (software) process modeling and lack of integration mechanism for the described process to seamlessly interact with daily development activities. This dissertation describes a research through which a framework has been established where processes can be manipulated, measured, and dynamically modified by interacting with project management techniques and activities in an integrated process modeling environment, thus closing the gap between process modeling and software development. In this research, processes are described using directed graphs, similar to the techniques with CPM. This way, the graphs can be manipulated visually while the properties of the graphs-can be used to check their validity. The partial ordering and the precedence relationship of the tasks in the graphs are similar to the one studied in other researches [Delcambre94] [Mills96]. Measurements of the effectiveness of the processes are added in this research. These measurements provide bases for the judgment when manipulating the graphs to produce or modify a process. Software development can be considered as activities related to three sets: a set of tasks (τ), a set of resources (ρ), and a set of constraints (y). The process, P, is then a function of all the sets interacting with each other: P = {τ, ρ, y). The interactions of these sets can be described in terms of different machine models using scheduling theory. While trying to produce an optimal solution satisfying a set of prescribed conditions using the analytical method would lead to a practically non-feasible formulation, many heuristic algorithms in scheduling theory combined with manual manipulation of the tasks can help to produce a reasonable good process, the effectiveness of which is reflected through a set of measurement criteria, in particular, the make-span, the float, and the bottlenecks. Through an integrated process modeling environment, these measurements can be obtained in real time, thus providing a feedback loop during the process execution. This feedback loop is essential for risk management and control

Significantly Increasing the Usability of Model Analysis Tools through Visual Feedback

National audienceA plethora of theoretical results are available which make possible the use of dynamic analysis and model-checking for software and system models expressed in high-level modeling languages like UML, SDL or AADL. Their usage is hindered by the complexity of information processing demanded from the modeler in order to apply them and to effectively exploit their results. Our thesis is that by improving the visual presentation of the analysis results, their exploitation can be highly improved. To support this thesis, we define a trace analysis approach based on the extraction of high-level semantics events from the low-level output of a simulation or model-checking tool. This extraction offers the basis for new types of scenario visualizations, improving scenario understanding and exploration. This approach was implemented in our UML/SysML analyzer and was validated in a controlled experiment that shows a significant increase in the usability of our tool, both in terms of task performance speed and in terms of user satisfaction

Conception basée modèle des systèmes temps réel et distribués

Les systèmes temps réel et distribués posent des problèmes complexes en termes de conception d'architecture et de description de comportements. De par leur criticité en vies humaines et leurs coûts de prototypage, ces systèmes ont motivé le développement d'une activité de recherche sur les langages de modélisation formelle et les techniques de validation basées modèle qui contribuent à la détection au plus tôt des erreurs de conception. Néanmoins, les langages formels ont eu un succès plus que limité dans l'industrie. L'arrivée du langage UML (Unified Modeling Language) a ouvert de nouveaux horizons pour l'intégration de langages de modélisation formelle dans une méthodologie de conception susceptible d'être mieux acceptée par les praticiens du domaine. En s'appuyant sur une expérience antérieure de la technique de description formelle Estelle et des extensions temporelles des réseaux de Petri, notre activité de recherche sur les cinq dernières années a débouché sur la production d'un profil UML nommé TURTLE (Timed UML and RT-LOTOS Environment). TURTLE surpasse UML 2.0 par ses extensions aux diagrammes d'analyse et de conception UML, sa sémantique formelle exprimée en RT-LOTOS, et ses outils de support (éditeur de diagrammes et outil de validation formelle combinant simulation et vérification basée sur une analyse d'accessibilité). La méthodologie TURTLE trouve son champ d'application naturel dans la conception de systèmes temps réel et la validation d'architectures de communication en particulier. L'approche proposée a été appliquée avec succès à des systèmes satellitaires et des protocoles d'authentification

Rapid manufacturing of vacuum forming components utilising reconfigurable screw pin tooling

Current market trends are moving from large quantity production towards small batch production and mass customization. This has led to the high demand for the flexibility and adaptability of manufacturing technology and systems. Several reconfigurable pin type tooling systems have been proposed and developed to satisfy such demands. However, these reconfigurable tooling systems still suffer from several drawbacks, including difficulties associated with positioning and locking the pins and problems of uneven “staircase” surface effects from relying on discrete finite size pins. The main focus of this research is on building a hybrid vacuum-forming machine system (HAVES) based on reconfigurable screw-pin tooling (SPT)as a test bed for understanding the processes involved in developing this technology and to examine the feasibility of implementing such technology in an industrial system. The SPT used is composed of identical screw pins,which are engaged with each other in an array pattern. By adjusting vertical displacement of the screw pins, a wide variety of component geometry can be formed. The adjustment methodology of the SPT is formulated mathematically in order to help construction of the SPT be parametrical thus enabling automatic CNC G-code generation. The HAVES test bed development involves full machine design and hardware and software integration. The hardware integration task included a CNC controller, drive motors, encoders, milling and screw adjustment heads, SPT, vacuum forming system. The software integration task involved the processing of three-dimensional CAD geometry to automatically generate post processed G codes in order to adjust the screw-pin to the required component geometry and subsequent surface machining for driving the final die geometry and minimize operator intervention. The completed HAVES test bed has been tested for accuracy, repeatability and functionalities with quality good results. An economic analysis has been also conducted to verify the economic feasibility of the HAVES test bed by comparing the cost of making vacuum forming components using a dedicated mould versus using the HAVES test bed

Un assistant méthodologique UML. Modélisation et vérification formelle de protocoles guidées par des patrons

La modélisation de services et protocoles est la clé de voute de la validation d’une architecture de communication. L’article propose de mener cette activité complexe dans le TURTLE Toolkit (TTool), environnement UML temps réel doté de capacités de vérification formelle. Les principes d’un assistant méthodologique pour l’analyse d’architecture de communication sont définis dans un cadre général, puis transposés à l’approche TTool sous la forme de patrons basés sur des cas d’utilisation et des scénarios paramétrables. L’utilisation de ces patrons est illustrée sur un protocole de communication point à multipoint par satellite

Regulation of Septin Dynamics by the Saccharomyces cerevisiae Lysine Acetyltransferase NuA4

In the budding yeast Saccharomyces cerevisiae, the lysine acetyltransferase NuA4 has been linked to a host of cellular processes through the acetylation of histone and non-histone targets. To discover proteins regulated by NuA4-dependent acetylation, we performed genome-wide synthetic dosage lethal screens to identify genes whose overexpression is toxic to non-essential NuA4 deletion mutants. The resulting genetic network identified a novel link between NuA4 and septin proteins, a group of highly conserved GTP-binding proteins that function in cytokinesis. We show that acetyltransferase-deficient NuA4 mutants have defects in septin collar formation resulting in the development of elongated buds through the Swe1-dependent morphogenesis checkpoint. We have discovered multiple sites of acetylation on four of the five yeast mitotic septins, Cdc3, Cdc10, Cdc12 and Shs1, and determined that NuA4 can acetylate three of the four in vitro. In vivo we find that acetylation levels of both Shs1 and Cdc10 are reduced in a catalytically inactive esa1 mutant. Finally, we determine that cells expressing a Shs1 protein with decreased acetylation in vivo have defects in septin localization that are similar to those observed in NuA4 mutants. These findings provide the first evidence that yeast septin proteins are acetylated and that NuA4 impacts septin dynamics

Real Time System Development with UML: A Case Study

In this thesis we look at the challenges regarding VoIP and to the developer of an application providing this service. We explore CASE tools that can be used to model and verify the design of a VoIP application. VoIP applications will not be accepted by the market unless it is able to provide an audio quality comparable to traditional phones. The voice module of the application that we analyse initially did not meet these requirements. We investigate how the design and implementation must be altered to meet them. Although UML in its current specification is not adapted to the design of real-time applications, CASE tools exist that propose an extension of UML for this purpose. We investigate two of these - Rational Rose RT and Telelogic Tau - for their usefulness in re-engineering the application. We show their support partially covers our needs and we present novel UML concepts that would have been useful in resolving our task. We further demonstrate important new concepts of UML 2.0

Timing Analysis using the MARTE Profile in the Design of Rail Automation Systems

International audienceFor dependable systems as in the railway domain the timing behaviour is considered part of the functional correctness. Thus timing requirements have to be traced and refined through the system and software development phases and validation and verification efforts have to address the timing as well as the pure input/output behaviour. We show how timing can be handled in a UML or SysML based approach to the development of software-intensive railway systems by using the new MARTE profile. Thereby timing becomes fully integrated in the chain of system and software models and may benefit from tool support. Moreover, automated timing analysis may be employed via model transformations which enables the exploration of timing-related issues in various design phases