AI/ML Algorithms and Applications in VLSI Design and Technology

An evident challenge ahead for the integrated circuit (IC) industry in the nanometer regime is the investigation and development of methods that can reduce the design complexity ensuing from growing process variations and curtail the turnaround time of chip manufacturing. Conventional methodologies employed for such tasks are largely manual; thus, time-consuming and resource-intensive. In contrast, the unique learning strategies of artificial intelligence (AI) provide numerous exciting automated approaches for handling complex and data-intensive tasks in very-large-scale integration (VLSI) design and testing. Employing AI and machine learning (ML) algorithms in VLSI design and manufacturing reduces the time and effort for understanding and processing the data within and across different abstraction levels via automated learning algorithms. It, in turn, improves the IC yield and reduces the manufacturing turnaround time. This paper thoroughly reviews the AI/ML automated approaches introduced in the past towards VLSI design and manufacturing. Moreover, we discuss the scope of AI/ML applications in the future at various abstraction levels to revolutionize the field of VLSI design, aiming for high-speed, highly intelligent, and efficient implementations

Design Space Exploration and Resource Management of Multi/Many-Core Systems

The increasing demand of processing a higher number of applications and related data on computing platforms has resulted in reliance on multi-/many-core chips as they facilitate parallel processing. However, there is a desire for these platforms to be energy-efficient and reliable, and they need to perform secure computations for the interest of the whole community. This book provides perspectives on the aforementioned aspects from leading researchers in terms of state-of-the-art contributions and upcoming trends

物理複製不能関数における安全性の評価と向上に関する研究

In this thesis, we focus on Physically Unclonable Functions (PUFs), which are expected as one of the most promising cryptographic primitives for secure chip authentication. Generally, PUFbased authentication is achieved by two approaches: (A) using a PUF itself, which has multiple challenge (input) and response (output) pairs, or (B) using a cryptographic function, the secret key of which is generated from a PUF with a single challenge-response pair (CRP). We contribute to:(1) evaluate the security of Approach (A), and (2) improve the security of Approach (B). (1) Arbiter-based PUFs were the most feasible type of PUFs, which was used to construct Approach (A). However, Arbiter-based PUFs have a vulnerability; if an attacker knows some CRPs, she/he can predict the remaining unknown CRPs with high probability. Bistable Ring PUF (BR-PUF) was proposed as an alternative, but has not been evaluated by third parties. In this thesis, in order to construct Approach (A) securely, we evaluate the difficulty of predicting responses of a BR-PUF experimentally. As a result, the same responses are frequently generated for two challenges with small Hamming distance. Also, particular bits of challenges have a great impact on the responses. In conclusion, BR-PUFs are not suitable for achieving Approach (A)securely. In future work, we should discuss an alternative PUF suitable for secure Approach (A).(2) In order to achieve Approach (B) securely, a secret key ? generated from a PUF response?should have high entropy. We propose a novel method of extracting high entropy from PUF responses. The core idea is to effectively utilize the information on the proportion of ‘1’s including in repeatedly-measured PUF responses. We evaluate its effectiveness by fabricated test chips. As a result, the extracted entropy is about 1.72 times as large as that without the proposed method.Finally, we organize newly gained knowledge in this thesis, and discuss a new application of PUF-based technologies.電気通信大学201

The model of an anomaly detector for HiLumi LHC magnets based on Recurrent Neural Networks and adaptive quantization

This paper focuses on an examination of an applicability of Recurrent Neural Network models for detecting anomalous behavior of the CERN superconducting magnets. In order to conduct the experiments, the authors designed and implemented an adaptive signal quantization algorithm and a custom GRU-based detector and developed a method for the detector parameters selection. Three different datasets were used for testing the detector. Two artificially generated datasets were used to assess the raw performance of the system whereas the 231 MB dataset composed of the signals acquired from HiLumi magnets was intended for real-life experiments and model training. Several different setups of the developed anomaly detection system were evaluated and compared with state-of-the-art OC-SVM reference model operating on the same data. The OC-SVM model was equipped with a rich set of feature extractors accounting for a range of the input signal properties. It was determined in the course of the experiments that the detector, along with its supporting design methodology, reaches F1 equal or very close to 1 for almost all test sets. Due to the profile of the data, the best_length setup of the detector turned out to perform the best among all five tested configuration schemes of the detection system. The quantization parameters have the biggest impact on the overall performance of the detector with the best values of input/output grid equal to 16 and 8, respectively. The proposed solution of the detection significantly outperformed OC-SVM-based detector in most of the cases, with much more stable performance across all the datasets.Comment: Related to arXiv:1702.0083

A Review of Current Research Trends in Power-Electronic Innovations in Cyber-Physical Systems.

In this paper, a broad overview of the current research trends in power-electronic innovations in cyber-physical systems (CPSs) is presented. The recent advances in semiconductor device technologies, control architectures, and communication methodologies have enabled researchers to develop integrated smart CPSs that can cater to the emerging requirements of smart grids, renewable energy, electric vehicles, trains, ships, internet of things (IoTs), etc. The topics presented in this paper include novel power-distribution architectures, protection techniques considering large renewable integration in smart grids, wireless charging in electric vehicles, simultaneous power and information transmission, multi-hop network-based coordination, power technologies for renewable energy and smart transformer, CPS reliability, transactive smart railway grid, and real-time simulation of shipboard power systems. It is anticipated that the research trends presented in this paper will provide a timely and useful overview to the power-electronics researchers with broad applications in CPSs.post-print2.019 K

Ultra-Low-Power Uwb Impulse Radio Design: Architecture, Circuits, And Applications

Recent advances in home healthcare, environmental sensing, and low power computing have created a need for wireless communication at very low power for low data rate applications. Due to higher energy/bit requirements at lower data -rate, achieving power levels low enough to enable long battery lifetime (~10 years) or power-harvesting supplies have not been possible with traditional approaches. Dutycycled radios have often been proposed in literature as a solution for such applications due to their ability to shut off the static power consumption at low data rates. While earlier radio nodes for such systems have been proposed based on a type of sleepwake scheduling, such implementations are still power hungry due to large synchronization uncertainty (~1[MICRO SIGN]s). In this dissertation, we utilize impulsive signaling and a pulse-coupled oscillator (PCO) based synchronization scheme to facilitate a globally synchronized wireless network. We have modeled this network over a widely varying parameter space and found that it is capable of reducing system cost as well as providing scalability in wireless sensor networks. Based on this scheme, we implemented an FCC compliant, 3-5GHz, timemultiplexed, dual-band UWB impulse radio transceiver, measured to consume only 20[MICRO SIGN]W when the nodes are synchronized for peer-peer communication. At the system level the design was measured to consume 86[MICRO SIGN]W of power, while facilitating multi- hop communication. Simple pulse-shaping circuitry ensures spectral efficiency, FCC compliance and ~30dB band-isolation. Similarly, the band-switchable, ~2ns turn-on receiver implements a non-coherent pulse detection scheme that facilitates low power consumption with -87dBm sensitivity at 100Kbps. Once synchronized the nodes exchange information while duty-cycling, and can use any type of high level network protocols utilized in packet based communication. For robust network performance, a localized synchronization detection scheme based on relative timing and statistics of the PCO firing and the timing pulses ("sync") is reported. No active hand-shaking is required for nodes to detect synchronization. A self-reinforcement scheme also helps maintain synchronization even in the presence of miss-detections. Finally we discuss unique ways to exploit properties of pulse coupled oscillator networks to realize novel low power event communication, prioritization, localization and immediate neighborhood validation for low power wireless sensor applications