116 research outputs found

    Routing Permutations in Partitioned Optical Passive Star Networks

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    It is shown that a POPS network with g groups and d processors per group can efficiently route any permutation among the n=dg processors. The number of slots used is optimal in the worst case, and is at most the double of the optimum for all permutations p such that p(i)i for all i.Comment: 8 pages, 3 figure

    Online Permutation Routing in Partitioned Optical Passive Star Networks

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    This paper establishes the state of the art in both deterministic and randomized online permutation routing in the POPS network. Indeed, we show that any permutation can be routed online on a POPS network either with O(dglogg)O(\frac{d}{g}\log g) deterministic slots, or, with high probability, with 5cd/g+o(d/g)+O(loglogg)5c\lceil d/g\rceil+o(d/g)+O(\log\log g) randomized slots, where constant c=exp(1+e1)3.927c=\exp (1+e^{-1})\approx 3.927. When d=Θ(g)d=\Theta(g), that we claim to be the "interesting" case, the randomized algorithm is exponentially faster than any other algorithm in the literature, both deterministic and randomized ones. This is true in practice as well. Indeed, experiments show that it outperforms its rivals even starting from as small a network as a POPS(2,2), and the gap grows exponentially with the size of the network. We can also show that, under proper hypothesis, no deterministic algorithm can asymptotically match its performance

    Topologies for Optical Interconnection Networks Based on the Optical Transpose Interconnection System

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    International audienceMany results exist in the literature describing technological and theoretical advances in optical network topologies and design. However, an essential effort has yet to be done in linking those results together. In this paper, we propose a step in this direction, by giving optical layouts for several graph-theoretical topologies studied in the literature, using the Optical Transpose Interconnection System (OTIS) architecture. These topologies include the family of Partitioned Optical Passive Star (POPS) and stack-Kautz networks as well as a generalization of the Kautz and de Bruijn digraphs

    Multidimensional Optimized Optical Modulation Formats

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    This chapter overviews the relatively large body of work (experimental and theoretical) on modulation formats for optical coherent links. It first gives basic definitions and performance metrics for modulation formats that are common in the literature. Then, the chapter discusses optimization of modulation formats in coded systems. It distinguishes between three cases, depending on the type of decoder employed, which pose quite different requirements on the choice of modulation format. The three cases are soft-decision decoding, hard-decision decoding, and iterative decoding, which loosely correspond to weak, medium, and strong coding, respectively. The chapter also discusses the realizations of the transmitter and transmission link properties and the receiver algorithms, including DSP and decoding. It further explains how to simply determine the transmitted symbol from the received 4D vector, without resorting to a full search of the Euclidean distances to all points in the whole constellation

    Optical fibre distributed access transmission systems (OFDATS)

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    Intelligent Sensor Networks

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    In the last decade, wireless or wired sensor networks have attracted much attention. However, most designs target general sensor network issues including protocol stack (routing, MAC, etc.) and security issues. This book focuses on the close integration of sensing, networking, and smart signal processing via machine learning. Based on their world-class research, the authors present the fundamentals of intelligent sensor networks. They cover sensing and sampling, distributed signal processing, and intelligent signal learning. In addition, they present cutting-edge research results from leading experts

    Space station data system analysis/architecture study. Task 2: Options development, DR-5. Volume 2: Design options

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    The primary objective of Task 2 is the development of an information base that will support the conduct of trade studies and provide sufficient data to make key design/programmatic decisions. This includes: (1) the establishment of option categories that are most likely to influence Space Station Data System (SSDS) definition; (2) the identification of preferred options in each category; and (3) the characterization of these options with respect to performance attributes, constraints, cost and risk. This volume contains the options development for the design category. This category comprises alternative structures, configurations and techniques that can be used to develop designs that are responsive to the SSDS requirements. The specific areas discussed are software, including data base management and distributed operating systems; system architecture, including fault tolerance and system growth/automation/autonomy and system interfaces; time management; and system security/privacy. Also discussed are space communications and local area networking

    COMPILER TECHNIQUES FOR EFFICIENT COMMUNICATIONS IN MULTIPROCESSOR SYSTEMS

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    Technical advances have brought circuit switching back to the stage of interconnection network design for high performance computing. Although circuit switching has long connection establishment delays and the dedication of connections prevents other communicating nodes from sharing the network, it has simple control logic and significant cost advantage over packet or wormhole switching. With the proper assistance from compilers, circuit switching has the potential of providing significant performance benefits when connections can be established prior to the actual communication. This dissertation presents a novel compilation framework for achieving efficient communications in circuit switching interconnection networks. The goal of the framework is to identify communication patterns in Single-Program-Multiple-Data (SPMD) parallel applications and compile these patterns as network configuration directives. This can significantly reduce the communication overhead on circuit switching interconnection networks. A powerful representation scheme is developed in this research to capture the property of communication patterns and allow manipulation of these patterns. Based on the temporal and spatial localities of communications and the capability of the compiler to identify the communication patterns, we classify communication patterns into three categories - static, persistent, and dynamic. We target static and persistent communications, which are dominant in most parallel applications. To identify communication patterns, we develop a novel symbolic expression analysis. We develop certain compiler techniques for analyzing communication patterns. Since the underlying network capacity is limited, we develop an algorithm to partition the program into phases based on the communication requirements and network capacity. To demonstrate the effectiveness of our framework, we implement an experimental compiler. The compiler identifies the communication patterns from the source code, partitions the program into phases, and inserts the network configuration directives at phase boundaries to achieve efficient communications. The compiler also can generate communication traces, which provides useful information about the communication pattern correlated to the structure of the source code. We develop a multiprocessor system simulator to evaluate our techniques. Our simulation-based performance analysis demonstrates that using our compiler techniques can achieve the same level, or even better level of communication performance than fast packet switching networks while using much less expensive circuit switches

    LOGISTICS IN CONTESTED ENVIRONMENTS

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    This report examines the transport and delivery of logistics in contested environments within the context of great-power competition (GPC). Across the Department of Defense (DOD), it is believed that GPC will strain our current supply lines beyond their capacity to maintain required warfighting capability. Current DOD efforts are underway to determine an appropriate range of platforms, platform quantities, and delivery tactics to meet the projected logistics demand in future conflicts. This report explores the effectiveness of various platforms and delivery methods through analysis in developed survivability, circulation, and network optimization models. Among other factors, platforms are discriminated by their radar cross-section (RCS), noise level, speed, cargo capacity, and self-defense capability. To maximize supply delivered and minimize the cost of losses, the results of this analysis indicate preference for utilization of well-defended convoys on supply routes where bulk supply is appropriate and smaller, and widely dispersed assets on shorter, more contested routes with less demand. Sensitivity analysis on these results indicates system survivability can be improved by applying RCS and noise-reduction measures to logistics assets.Director, Warfare Integration (OPNAV N9I)Major, Israel Defence ForcesCivilian, Singapore Technologies Engineering Ltd, SingaporeCommander, Republic of Singapore NavyCommander, United States NavyCaptain, Singapore ArmyLieutenant, United States NavyLieutenant, United States NavyMajor, Republic of Singapore Air ForceCaptain, United States Marine CorpsLieutenant, United States NavyLieutenant, United States NavyLieutenant, United States NavyLieutenant, United States NavyLieutenant, United States NavyCaptain, Singapore ArmyLieutenant Junior Grade, United States NavyCaptain, Singapore ArmyLieutenant Colonel, Republic of Singapore Air ForceApproved for public release. distribution is unlimite

    The Fifth NASA Symposium on VLSI Design

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    The fifth annual NASA Symposium on VLSI Design had 13 sessions including Radiation Effects, Architectures, Mixed Signal, Design Techniques, Fault Testing, Synthesis, Signal Processing, and other Featured Presentations. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The presentations share insights into next generation advances that will serve as a basis for future VLSI design
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