Memristors for the Curious Outsiders

We present both an overview and a perspective of recent experimental advances and proposed new approaches to performing computation using memristors. A memristor is a 2-terminal passive component with a dynamic resistance depending on an internal parameter. We provide an brief historical introduction, as well as an overview over the physical mechanism that lead to memristive behavior. This review is meant to guide nonpractitioners in the field of memristive circuits and their connection to machine learning and neural computation.Comment: Perpective paper for MDPI Technologies; 43 page

Device modelling for bendable piezoelectric FET-based touch sensing system

Flexible electronics is rapidly evolving towards devices and circuits to enable numerous new applications. The high-performance, in terms of response speed, uniformity and reliability, remains a sticking point. The potential solutions for high-performance related challenges bring us back to the timetested silicon based electronics. However, the changes in the response of silicon based devices due to bending related stresses is a concern, especially because there are no suitable models to predict this behavior. This also makes the circuit design a difficult task. This paper reports advances in this direction, through our research on bendable Piezoelectric Oxide Semiconductor Field Effect Transistor (POSFET) based touch sensors. The analytical model of POSFET, complimented with Verilog-A model, is presented to describe the device behavior under normal force in planar and stressed conditions. Further, dynamic readout circuit compensation of POSFET devices have been analyzed and compared with similar arrangement to reduce the piezoresistive effect under tensile and compressive stresses. This approach introduces a first step towards the systematic modeling of stress induced changes in device response. This systematic study will help realize high-performance bendable microsystems with integrated sensors and readout circuitry on ultra-thin chips (UTCs) needed in various applications, in particular, the electronic skin (e-skin)

Modified Level Restorers Using Current Sink and Current Source Inverter Structures for BBL-PT Full Adder

Full adder is an essential component for the design and development of all types of processors like digital signal processors (DSP), microprocessors etc. In most of these systems adder lies in the critical path that affects the overall speed of the system. So enhancing the performance of the 1-bit full adder cell is a significant goal. In this paper, we proposed two modified level restorers using current sink and current source inverter structures for branch-based logic and pass-transistor (BBL-PT) full adder [1]. In BBL-PT full adder, there lies a drawback i.e. voltage step existence that could be eliminated in the proposed logics by using the current sink inverter and current source inverter structures. The proposed full adders are compared with the two standard and well-known logic styles, i.e. conventional static CMOS logic and Complementary Pass transistor Logic (CPL), demonstrated the good delay performance. The implementation of 8-bit ripple carry adder based on proposed full adders are finally demonstrated. The CPL 8-bit RCA and as well as the proposed ones is having better delay performance than the static CMOS and BBL-PT 8-bit RCA. The performance of the proposed BBL-PT cell with current sink & current source inverter structures are examined using PSPICE and the model parameters of a 0.13 µm CMOS process

HVAC SYSTEM REMOTE MONITORING AND DIAGNOSIS

A monitoring system for an HVAC system of a building includes a monitoring server located remotely from the building. The monitoring server receives, from a device installed at the building, (i) time-domain current data based on a measured aggregate current supplied to a plurality of components of the HVAC system, and (ii) data based on frequency-domain current data of the measured aggregate current. Based on the received data, the monitoring server accesses (i) whether a failure has occurred in a first com ponent of the plurality of components and (ii) generates a preliminary advisory in response to determining that the failure has occurred. The monitoring server compares the preliminary advisory to a threshold value based on data stored from prior advisories. If the preliminary advisory is on a first side of the threshold value, the monitoring server provides the preliminary advisory as a first advisory to a technician for review

Implementation and Applications of a Ternary Threshold Logic Gate

Reducing delay, power consumption, and chip area of a logic circuit are the main targets of a designer. Most of the times, the designer sacrifices power consumption and chip area to improve delay for a given technology node. To overcome this problem, we propose a ternary threshold logic gate. We implement the proposed gate by combining threshold logic and ternary logic. Then, we construct basic building blocks of a ternary ALU (as logic gates, comparator, and arithmetic circuits) using the proposed gate. We show that the proposed ternary TLG improves delay, power consumption, and chip area of ternary circuits via simulations. Thus, the proposed gate can be used to improve delay, power consumption, and chip area of ternary circuits

Electron Spins in Artificial Atoms and Molecules for Quantum Computing

Achieving control over the electron spin in quantum dots (artificial atoms) or real atoms promises access to new technologies in conventional and in quantum information processing. Here we review our proposal for quantum computing with spins of electrons confined to quantum dots. We discuss the basic requirements for implementing spin-qubits, and describe a complete set of quantum gates for single- and two-qubit operations. We show how a quantum dot attached to leads can be used for spin filtering and spin read-out, and as a spin-memory device. Finally, we focus on the experimental characterization of the quantum dot systems, and discuss transport properties of a double-dot and show how Kondo correlations can be used to measure the Heisenberg exchange interaction between the spins of two dots.Comment: 13 pages, 8 figures, Invited Review (Semiconductor Spintronics, Special Issue of SST