Flexible Traffic Management in Broadband Access Networks using Software Defined Networking

Abstract-Over the years, the demand for high bandwidth services, such as live and on-demand video streaming, steadily increased. The adequate provisioning of such services is challenging and requires complex network management mechanisms to be implemented by Internet service providers (ISPs). In current broadband network architectures, the traffic of subscribers is tunneled through a single aggregation point, independent of the different service types it belongs to. While having a single aggregation point eases the management of subscribers for the ISP, it implies huge bandwidth requirements for the aggregation point and potentially high end-to-end latency for subscribers. An alternative would be a distributed subscriber management, adding more complexity to the management itself. In this paper, a new traffic management architecture is proposed that uses the concept of Software Defined Networking (SDN) to extend the existing Ethernet-based broadband network architecture, enabling a more efficient traffic management for an ISP. By using SDN-enabled home gateways, the ISP can configure traffic flows more dynamically, optimizing throughput in the network, especially for bandwidth-intensive services. Furthermore, a proofof-concept implementation of the approach is presented to show the general feasibility and study configuration tradeoffs. Analytic considerations and testbed measurements show that the approach scales well with an increasing number of subscriber sessions

Re-designing Dynamic Content Delivery in the Light of a Virtualized Infrastructure

We explore the opportunities and design options enabled by novel SDN and NFV technologies, by re-designing a dynamic Content Delivery Network (CDN) service. Our system, named MOSTO, provides performance levels comparable to that of a regular CDN, but does not require the deployment of a large distributed infrastructure. In the process of designing the system, we identify relevant functions that could be integrated in the future Internet infrastructure. Such functions greatly simplify the design and effectiveness of services such as MOSTO. We demonstrate our system using a mixture of simulation, emulation, testbed experiments and by realizing a proof-of-concept deployment in a planet-wide commercial cloud system.Comment: Extended version of the paper accepted for publication in JSAC special issue on Emerging Technologies in Software-Driven Communication - November 201

Projeto, implementaçâo e avaliação de um gateway de rede de banda larga usando um processador de pacote programável

Orientador: Christian Rodolfo Esteve RothenbergDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de ComputaçãoResumo: BNG, também conhecido como BRAS desempenha um papel crucial na Internet atual, ele maneja a maioria do tráfego da rede de acesso, implementando políticas e serviços que um Internet Service Provider (ISP) define por assinante. Porém, este dispositivo de rede é caro, proprietário, limitado e de lenta atualização, virando um ponto de falha para implantar novas funcionalidades e corrigir problemas na rede sem interromper a operação normal do serviço. Este trabalho pretende projetar, implementar e evaluar um BNG S/W switch flexível e otimizado usando a linguagem P4, aproveitando seus recursos para descrever o processamento de pacotes com programação de plano de dados agnóstica ao alvo que é vantajoso ao fornecer aos desenvolvedores (por exemplo, operadores de rede) uma alternativa aos esquemas de manipulação de pacotes. Nos propomos usar o compilador MACSAD que junta a abstração de P4 e APIs de OpenDataPlane (ODP) para suportar aplicativos de rede baseados em Linux com alto desempenho em varias arquiteturas (ARM, Intel, MIPS e PowerPC). A versão atual do MACSAD dá suporte para a versão anterior da linguagem P4 (P4 _14). Portanto, parte deste trabalho é dar suporte ao compilador MACSAD para o versão atual (P4 _16) no qual é construído o plano de dados de BNG. Além disso, foi feita uma avaliação funcional e de desempenho do BNG S/W switch em um cenário realista e usando dois geradores de tráfego Open Source em H/W e S/W. Os resultados mostram o impacto dos parâmetros do dispositivo alvo, tais como o número de núcleos, tamanhos de burst, pacotes de E/S e cargas de trabalho que afetam o desempenho em termos de taxa de transferência e latência fornecendo os melhores parametros de configuração para nossa implementaçãoAbstract: Broadband Network Gateway (BNG), also known as Broadband Remote Access Server (BRAS) plays a crucial role in today¿s internet, as it handles the majority of access network traffic, implementing network policies and services that a Internet Service Provider (ISP) defines per subscriber. However, this network device is normally expensive, proprietary, limited and slow to upgrade, and a point of failure when deploying new functionalities and correcing issues on the network without disrupting normal service operations. This work intends to design, implement and evaluate a flexible and optimized BNG Software (S/W) switch by using programming protocol-independent packet processors (P4) language, taking advantage of its features to describe the packet processing with target-agnostic data-plane programmability which is advantageous by providing to developers (i.e., network operators) an alternative to packet handling schemes. We propose to use the Multi-Architecture Compiler System for Abstract Dataplanes (MACSAD) compiler which merges the P4 abstraction and OpenDataPlane (ODP) APIs to support Linux-based network applications with high performance across some architectures (ARM, Intel, MIPS, and PowerPC). The actual version of MACSAD brings support for the previous release of the P4 language (P4_14). Therefore part of this work is to bring support to MACSAD for the current release (P4_16) on which the proposed BNG dataplane is built. We use functional and performance evaluation of the BNG S/W switch in a realistic scenario rs. The results show the impact of both target parameters such as the number of cores, burst sizes, packet IO, and workloads and how it affects the performance regarding throughput and latency bringing the best parameter configuration for our implementationMestradoEngenharia de ComputaçãoMestre em Engenharia Elétric

Accelerating Network Functions using Reconfigurable Hardware. Design and Validation of High Throughput and Low Latency Network Functions at the Access Edge

Providing Internet access to billions of people worldwide is one of the main technical challenges in the current decade. The Internet access edge connects each residential and mobile subscriber to this network and ensures a certain Quality of Service (QoS). However, the implementation of access edge functionality challenges Internet service providers: First, a good QoS must be provided to the subscribers, for example, high throughput and low latency. Second, the quick rollout of new technologies and functionality demands flexible configuration and programming possibilities of the network components; for example, the support of novel, use-case-specific network protocols. The functionality scope of an Internet access edge requires the use of programming concepts, such as Network Functions Virtualization (NFV). The drawback of NFV-based network functions is a significantly lowered resource efficiency due to the execution as software, commonly resulting in a lowered QoS compared to rigid hardware solutions. The usage of programmable hardware accelerators, named NFV offloading, helps to improve the QoS and flexibility of network function implementations. In this thesis, we design network functions on programmable hardware to improve the QoS and flexibility. First, we introduce the host bypassing concept for improved integration of hardware accelerators in computer systems, for example, in 5G radio access networks. This novel concept bypasses the system’s main memory and enables direct connectivity between the accelerator and network interface card. Our evaluations show an improved throughput and significantly lowered latency jitter for the presented approach. Second, we analyze different programmable hardware technologies for hardware-accelerated Internet subscriber handling, including three P4-programmable platforms and FPGAs. Our results demonstrate that all approaches have excellent performance and are suitable for Internet access creation. We present a fully-fledged User Plane Function (UPF) designed upon these concepts and test it in an end-to-end 5G standalone network as part of this contribution. Third, we analyze and demonstrate the usability of Active Queue Management (AQM) algorithms on programmable hardware as an expansion to the access edge. We show the feasibility of the CoDel AQM algorithm and discuss the challenges and constraints to be considered when limited hardware is used. The results show significant improvements in the QoS when the AQM algorithm is deployed on hardware. Last, we focus on network function benchmarking, which is crucial for understanding the behavior of implementations and their optimization, e.g., Internet access creation. For this, we introduce the load generation and measurement framework P4STA, benefiting from flexible software-based load generation and hardware-assisted measuring. Utilizing programmable network switches, we achieve a nanosecond time accuracy while generating test loads up to the available Ethernet link speed