265 research outputs found

    Cluster Computing and Performance Measurement

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    There is a continual demand for greater computational power from computer systems than is currently possible. Areas requiring great computational speed include numerical simulation of scientific and engineering problems. Such problems often need huge quantities of repetitive calculations on large amount of data to give valid results. Cluster computing offers many advantages as a highly cost-effective and often scalable approach for high-performance computing in general. To achieve the full potential of high performance computing systems, centralized configuration services are the starting point. For a large scale of projects, cluster computing is required where it is supposed to be optimized for the system topology and management of the project. This paper presents the consequences of using cluster computing and performance management and the consequences without this technology. The experimental results of this paper highlight the affects of the design of this service and provide a comprehensive performance analysis of the project

    Distributed Handler Architecture

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    Thesis (PhD) - Indiana University, Computer Sciences, 2007Over the last couple of decades, distributed systems have been demonstrated an architectural evolvement based on models including client/server, multi-tier, distributed objects, messaging and peer-to-peer. One recent evolutionary step is Service Oriented Architecture (SOA), whose goal is to achieve loose-coupling among the interacting software applications for scalability and interoperability. The SOA model is engendered in Web Services, which provide software platforms to build applications as services and to create seamless and loosely-coupled interactions. Web Services utilize supportive functionalities such as security, reliability, monitoring, logging and so forth. These functionalities are typically provisioned as handlers, which incrementally add new capabilities to the services by building an execution chain. Even though handlers are very important to the service, the way of utilization is very crucial to attain the potential benefits. Every attempt to support a service with an additive functionality increases the chance of having an overwhelmingly crowded chain: this makes Web Service fat. Moreover, a handler may become a bottleneck because of having a comparably higher processing time. In this dissertation, we present Distributed Handler Architecture (DHArch) to provide an efficient, scalable and modular architecture to manage the execution of the handlers. The system distributes the handlers by utilizing a Message Oriented Middleware and orchestrates their execution in an efficient fashion. We also present an empirical evaluation of the system to demonstrate the suitability of this architecture to cope with the issues that exist in the conventional Web Service handler structures

    Simulation of the UKQCD computer

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    CPS์—์„œ์˜ ๋ฌผ๋ฆฌ ์—๋Ÿฌ๋ฅผ ๋ฐฉ์ง€ํ•˜๋Š” ์•ˆ์ „ ๋ณด์žฅ ๋ฉ”์ปค๋‹ˆ์ฆ˜

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    ํ•™์œ„๋…ผ๋ฌธ(์„์‚ฌ) -- ์„œ์šธ๋Œ€ํ•™๊ต๋Œ€ํ•™์› : ๊ณต๊ณผ๋Œ€ํ•™ ์ปดํ“จํ„ฐ๊ณตํ•™๋ถ€, 2023. 2. ์ด์ฐฝ๊ฑด.This paper considers a cyber-physical system with a so-called self-looping node that repeats the inner-loop for physical situation awareness, i.e., more loops for more harsh physical situations. Regarding such a self-looping node, we observe the existence of physical errors that make the looping useless and eventually cause a critical failure. To prevent such a critical failure despite a physical error, this paper proposes a novel mechanism by introducing time wall and safety backup. The time wall limits the time budget for the self-looping node so as to switch to the safety backup while still meeting the deadline to prevent critical failure despite physical errors. Our experiments through both simulation and actual implementation show that the proposed mechanism gives a comparable accuracy with the existing methods in normal cases while completely preventing critical failure in physical error cases.๋ณธ ๋…ผ๋ฌธ์€ ๋ฌผ๋ฆฌ ์ƒํ™ฉ ์ธ์ง€๋ฅผ ์œ„ํ•ด ๋‚ด๋ถ€ ๋ฃจํ”„๋ฅผ ๋ฐ˜๋ณตํ•˜๋Š” ์ž๊ธฐ๋ฐ˜๋ณต ๋ชจ๋“ˆ(self-looping module)์ด ์žˆ๋Š” ์‚ฌ์ด๋ฒ„ ๋ฌผ๋ฆฌ ์‹œ์Šคํ…œ์„ ๊ณ ๋ คํ•œ๋‹ค. ์ž๊ธฐ๋ฐ˜๋ณต ๋ชจ๋“ˆ์€ ๋” ๋†’์€ ์ •ํ™•๋„๋ฅผ ์œ„ํ•ด ๋‚ด๋ถ€ ๋ฃจํ”„๋ฅผ ๋ฐ˜๋ณตํ•˜์ง€๋งŒ, ์„ค๊ณ„ ๋‹จ๊ณ„์—์„œ ๊ณ ๋ ค๋˜์ง€ ๋ชปํ•œ ๋ฌผ๋ฆฌ ํ™˜๊ฒฝ์„ ๋งˆ์ฃผํ•˜๊ฒŒ ๋˜๋ฉด ๋ฃจํ”„๋ฅผ ๋ฐ˜๋ณตํ•˜๋”๋ผ๋„ ๋ชฉํ‘œ ์ •ํ™•๋„์— ๋„๋‹ฌํ•˜์ง€ ๋ชปํ•˜๋Š” ๋ฌผ๋ฆฌ ์—๋Ÿฌ(physical error) ์ƒํ™ฉ์ด ๋ฐœ์ƒํ•  ์ˆ˜ ์žˆ๋‹ค. ๋ฌธ์ œ๋Š” ํ˜„์žฌ์˜ ์‹œ์Šคํ…œ์˜ ๊ฒฝ์šฐ ์ž๊ธฐ๋ฐ˜๋ณต ๋ชจ๋“ˆ์ด ๋ฌผ๋ฆฌ ์—๋Ÿฌ๋ฅผ ์ธ์ง€ํ•˜์ง€ ๋ชปํ•˜๊ธฐ ๋•Œ๋ฌธ์— ๊ณ„์†ํ•ด์„œ ๋ฃจํ”„๋ฅผ ๋ฐ˜๋ณตํ•˜๊ฒŒ ๋˜๊ณ , ๋ฐ๋“œ๋ผ์ธ์„ ๋†“์น˜๋Š” ๋“ฑ ์‹œ์Šคํ…œ ์ž์ฒด์˜ ์น˜๋ช…์ ์ธ ์˜ค๋ฅ˜๋กœ ์ด์–ด์ง„๋‹ค๋Š” ๊ฒƒ์ด๋‹ค. ๋ณธ ๋…ผ๋ฌธ์—์„œ๋Š” ๋ฌผ๋ฆฌ ์—๋Ÿฌ ์ƒํ™ฉ์—์„œ๋„ ์ตœ์†Œํ•œ์˜ ์•ˆ์ „์„ ๋ณด์žฅํ•˜๊ธฐ ์œ„ํ•ด ์‹œ๊ฐ„ ์žฅ๋ฒฝ(time wall)๊ณผ ์•ˆ์ „ ๋ฐฑ์—…(safety backup)์„ ๋„์ž…ํ•œ ์ƒˆ๋กœ์šด ๋ฉ”์ปค๋‹ˆ์ฆ˜์„ ์ œ์•ˆํ•œ๋‹ค. ์‹œ๊ฐ„ ์žฅ๋ฒฝ์€ ์ž๊ธฐ๋ฐ˜๋ณต ๋ชจ๋“ˆ์˜ ์ตœ๋Œ€ ์ˆ˜ํ–‰ ์‹œ๊ฐ„์œผ๋กœ, ์ž๊ธฐ๋ฐ˜๋ณต ๋ชจ๋“ˆ์ด ์‹œ๊ฐ„ ์žฅ๋ฒฝ๋งŒํผ ์‹คํ–‰ํ–ˆ๋Š”๋ฐ๋„ ๋ชฉํ‘œ ์ •ํ™•๋„์— ๋„๋‹ฌํ•˜์ง€ ๋ชปํ•˜๋ฉด ์•ˆ์ „ ๋ฐฑ์—… ๋ชจ๋“œ๋กœ ์ „ํ™˜ํ•œ๋‹ค. ๋ณธ ๋…ผ๋ฌธ์€ ์‹œ๋ฎฌ๋ ˆ์ด์…˜๊ณผ ์‹ค์ œ ์ž์œจ์ฃผํ–‰ ์†Œํ”„ํŠธ์›จ์–ด์ธ Autoware์— ์ œ์•ˆํ•˜๋Š” ๋ฉ”์ปค๋‹ˆ์ฆ˜์„ ์ ์šฉํ•˜์—ฌ ์ œ์•ˆํ•˜๋Š” ๋ฉ”์ปค๋‹ˆ์ฆ˜์ด ์น˜๋ช…์  ์˜ค๋ฅ˜๋ฅผ ์™„์ „ํžˆ ๋ฐฉ์ง€ํ•˜๋ฉด์„œ, ์‹ค์ œ ์ž์œจ์ฃผํ–‰ ์†Œํ”„ํŠธ์›จ์–ด์—๋„ ์ ์šฉ ๊ฐ€๋Šฅํ•จ์„ ๋ณด์˜€๋‹ค.1 Introduction 1 2 Related Work 5 3 Task and Resource Model 6 4 Safety Guarantee Mechanism Against Physical Errors 9 5 Classic Bound based Budget Analysis 13 5.1 Some Useful Computations on DAGs 14 5.2 Simple Solution 15 5.3 Solution with LP 18 6 CPC based Budget Analysis 21 6.1 Initial Budget Calculation 24 6.2 Binary Search for Finding the Optimal Budget 26 7 Generalize to Multiple Self-looping Nodes 30 7.1 Ambiguity in multiple self-looping nodes 30 7.2 Multiple Self-Looping Nodes: A Formal Model 32 7.3 Multiple self-looping nodes: Computing WCETs 34 8 Evaluation 37 8.1 Simulation with Synthetic DAG Workload 37 8.2 Implementation 42 9 Conclusion 46 9.1 Summary 46 9.2 Future Work 46 References 48์„

    Analogue neuromorphic systems.

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    This thesis addresses a new area of science and technology, that of neuromorphic systems, namely the problems and prospects of analogue neuromorphic systems. The subject is subdivided into three chapters. Chapter 1 is an introduction. It formulates the oncoming problem of the creation of highly computationally costly systems of nonlinear information processing (such as artificial neural networks and artificial intelligence systems). It shows that an analogue technology could make a vital contribution to the creation such systems. The basic principles of creation of analogue neuromorphic systems are formulated. The importance will be emphasised of the principle of orthogonality for future highly efficient complex information processing systems. Chapter 2 reviews the basics of neural and neuromorphic systems and informs on the present situation in this field of research, including both experimental and theoretical knowledge gained up-to-date. The chapter provides the necessary background for correct interpretation of the results reported in Chapter 3 and for a realistic decision on the direction for future work. Chapter 3 describes my own experimental and computational results within the framework of the subject, obtained at De Montfort University. These include: the building of (i) Analogue Polynomial Approximator/lnterpolatoriExtrapolator, (ii) Synthesiser of orthogonal functions, (iii) analogue real-time video filter (performing the homomorphic filtration), (iv) Adaptive polynomial compensator of geometrical distortions of CRT- monitors, (v) analogue parallel-learning neural network (backpropagation algorithm). Thus, this thesis makes a dual contribution to the chosen field: it summarises the present knowledge on the possibility of utilising analogue technology in up-to-date and future computational systems, and it reports new results within the framework of the subject. The main conclusion is that due to its promising power characteristics, small sizes and high tolerance to degradation, the analogue neuromorphic systems will playa more and more important role in future computational systems (in particular in systems of artificial intelligence)

    Aerodynamics Optimization of the Univeniti Teknologi PETRONAS 'PERODUA Eco-ChaUenge 2011' Car

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    This is the construction and report on the experimentation of a shape-optimization method applied to aerodynamic design of a car. The scopes of study areas are in research, designing and analysis in computational fluid dynamics tool. The significance of this research would be important to evaluate the condition of the final model that posses the best drag coefficient This research starts by searching for any other relevant journal or article published by other researches and from there, the design would be review and useful information will be summarize and taken as an information to this research. From the data available from the model, the drag coefficient will be calculated manually and also by using software. CATIA v5, GAMBIT v2.2.30 and FLUENT v6.3.26 software are then used to design analyze the air flow behavior. The result from the computational fluid dynamics software will be compare with the result from wind tunnel experiment

    A Control-Theoretic Design And Analysis Framework For Resilient Hard Real-Time Systems

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    We introduce a new design metric called system-resiliency which characterizes the maximum unpredictable external stresses that any hard-real-time performance mode can withstand. Our proposed systemresiliency framework addresses resiliency determination for real-time systems with physical and hardware limitations. Furthermore, our framework advises the system designer about the feasible trade-offs between external system resources for the system operating modes on a real-time system that operates in a multi-parametric resiliency environment. Modern multi-modal real-time systems degrade the systemโ€™s operational modes as a response to unpredictable external stimuli. During these mode transitions, real-time systems should demonstrate a reliable and graceful degradation of service. Many control-theoretic-based system design approaches exist. Although they permit real-time systems to operate under various physical constraints, none of them allows the system designer to predict the system-resiliency over multi-constrained operating environment. Our framework fills this gap; the proposed framework consists of two components: the design-phase and runtime control. With the design-phase analysis, the designer predicts the behavior of the real-time system for variable external conditions. Also, the runtime controller navigates the system to the best desired target using advanced control-theoretic techniques. Further, our framework addresses the system resiliency of both uniprocessor and multicore processor systems. As a proof of concept, we first introduce a design metric called thermal-resiliency, which characterizes the maximum external thermal stress that any hard-real-time performance mode can withstand. We verify the thermal-resiliency for the external thermal stresses on a uniprocessor system through a physical testbed. We show how to solve some of the issues and challenges of designing predictable real-time systems that guarantee hard deadlines even under transitions between modes in an unpredictable thermal environment where environmental temperature may dynamically change using our new metric. We extend the derivation of thermal-resiliency to multicore systems and determine the limitations of external thermal stress that any hard-real-time performance mode can withstand. Our control-theoretic framework allows the system designer to allocate asymmetric processing resources upon a multicore proiii cessor and still maintain thermal constraints. In addition, we develop real-time-scheduling sub-components that are necessary to fully implement our framework; toward this goal, we investigate the potential utility of parallelization for meeting real-time constraints and minimizing energy. Under malleable gang scheduling of implicit-deadline sporadic tasks upon multiprocessors, we show the non-necessity of dynamic voltage/frequency regarding optimality of our scheduling problem. We adapt the canonical schedule for DVFS multiprocessor platforms and propose a polynomial-time optimal processor/frequency-selection algorithm. Finally, we verify the correctness of our framework through multiple measurable physical and hardware constraints and complete our work on developing a generalized framework

    An accurate prefetching policy for object oriented systems

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    PhD ThesisIn the latest high-performance computers, there is a growing requirement for accurate prefetching(AP) methodologies for advanced object management schemes in virtual memory and migration systems. The major issue for achieving this goal is that of finding a simple way of accurately predicting the objects that will be referenced in the near future and to group them so as to allow them to be fetched same time. The basic notion of AP involves building a relationship for logically grouping related objects and prefetching them, rather than using their physical grouping and it relies on demand fetching such as is done in existing restructuring or grouping schemes. By this, AP tries to overcome some of the shortcomings posed by physical grouping methods. Prefetching also makes use of the properties of object oriented languages to build inter and intra object relationships as a means of logical grouping. This thesis describes how this relationship can be established at compile time and how it can be used for accurate object prefetching in virtual memory systems. In addition, AP performs control flow and data dependency analysis to reinforce the relationships and to find the dependencies of a program. The user program is decomposed into prefetching blocks which contain all the information needed for block prefetching such as long branches and function calls at major branch points. The proposed prefetching scheme is implemented by extending a C++ compiler and evaluated on a virtual memory simulator. The results show a significant reduction both in the number of page fault and memory pollution. In particular, AP can suppress many page faults that occur during transition phases which are unmanageable by other ways of fetching. AP can be applied to a local and distributed virtual memory system so as to reduce the fault rate by fetching groups of objects at the same time and consequently lessening operating system overheads.British Counci

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    Book of abstracts of the 15th International Symposium of Croatian Metallurgical Society - SHMD \u272022, Materials and metallurgy

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    Book of abstracts of the 15th International Symposium of Croatian Metallurgical Society - SHMD \u272022, Materials and metallurgy, Zagreb, Croatia, March 22-23, 2022. Abstracts are organized in four sections: Materials - section A; Process metallurgy - Section B; Plastic processing - Section C and Metallurgy and related topics - Section D
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