An evolutionary approach to the synthesis of combinational circuits

This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: 2-to-1 multiplexer, one-bit full adder, four-bit parity checker and two-bit multiplier. The objective of this work is to generate a functional circuit with the minimum number of gates.N/

A hybrid algorithm for logic circuit synthesis

In view of the fact that Genetic Algorithms (GAs) are not well suited for fine-tuning structures that are close to optimal solutions [1], this paper suggests the incorporation of local improvement operators into the GA recombination phase. This study presents a hybrid genetic algorithm, also known as Memetic Algorithm (MA), applied to the design of combinational logic circuits. MAs are evolutionary algorithms (EAs) that apply a separate local search process to refine individuals (i.e. that improve their fitness by hill-climbing). Under different contexts and situations, MAs are also known as hybrid EAs or genetic local searchers. The proposed MA associates a GA with the gate type local search (GTLS). Combining global and local search is a strategy used by many successful global optimization approaches, and MAs have in fact been recognized as a powerful algorithmic paradigm for evolutionary computing. We also modify the calculation of the fitness function by including a discontinuity evaluation that measures the error variability of the Boolean table. The results show an improvement of the final fitness function followed by a reduction of the average number and the standard deviation of generations required to reach the solutions, for all the tested circuits.N/

An Evolutionary Approach to the Synthesis of Combinational Circuits

Abstract -This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: 2-to-1 multiplexer, one-bit full adder, four-bit parity checker and a two-bit multiplier. The objective of this work is to generate a functional circuit with the minimum number of gates

A Memetic Algorithm for Logic Circuit Design

Memetic Algorithms (MAs) have shown to be very effective in solving many hard combinatorial optimization problems. In this perspective, this paper presents a MA for combinational logic circuits synthesis. The proposed MA combines a Genetic Algorithm (GA) for digital circuit design with the gate type local search (GTLS). The combination of a global and a local search is a strategy used by many successful hybrid optimization approaches. The main idea is to apply a local refinement to an Evolutionary Algorithm (EA) in order to improve the fitness of the individuals in the population. The obtained results indicate that the MA reduces the number of generations required to reach the solutions and its standard deviation while improves the final fitness function.N/

A Memetic Algorithm for Logic Circuit Design

Memetic Algorithms (MAs) have shown to be very effective in solving many hard combinatorial optimization problems. In this perspective, this paper presents a MA for combinational logic circuits synthesis. The proposed MA combines a Genetic Algorithm (GA) for digital circuit design with the gate type local search (GTLS). The combination of a global and a local search is a strategy used by many successful hybrid optimization approaches. The main idea is to apply a local refinement to an Evolutionary Algorithm (EA) in order to improve the fitness of the individuals in the population. The obtained results indicate that the MA reduces the number of generations required to reach the solutions and its standard deviation while improves the final fitness function.N/

New Concepts Towards the Synthesis of Digital Circuits Through Genetic Algorithms

This paper analyses the performance of a Genetic Algorithm using two new concepts, namely a static fitness function including a discontinuity measure and a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. In both cases, experiments reveal superior results in terms of speed and convergence to achieve a solution

Digital Circuit Design Using Dynamic Fitness Functions

This paper proposes and analyses the performance of a Genetic Algorithm using two new concepts, namely a static fitness function including a discontinuity measure and a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. In both cases, experiments reveal superior results in terms of speed and convergence to achieve a solution.N/

Evolutionary design of combinational circuits using fractional-order fitness functions

This paper analyses the performance of a genetic algorithm using the new concept of fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. The experiments reveal superior results in terms of speed and convergence to achieve a solution.N/

Fractional-order evolutionary design of digital circuits

This paper analyses the performance of a Genetic Algorithm (GA) in the synthesis of digital circuits using a new approach. The novel concept extends the classical fitness function by introducing a fractional-order dynamical evaluation. The dynamic fitness function results from an analogy with control systems where it is possible to benefit the proportional algorithm by including a differential component. For this purpose the non integer derivative is approximated through Pad´e fractions. The experiments reveal superior results when comparing with the classical fitness method.N/