Symbol Synchronization for SDR Using a Polyphase Filterbank Based on an FPGA

This paper is devoted to the proposal of a highly efficient symbol synchronization subsystem for Software Defined Radio. The proposed feedback phase-locked loop timing synchronizer is suitable for parallel implementation on an FPGA. The polyphase FIR filter simultaneously performs matched-filtering and arbitrary interpolation between acquired samples. Determination of the proper sampling instant is achieved by selecting a suitable polyphase filterbank using a derived index. This index is determined based on the output either the Zero-Crossing or Gardner Timing Error Detector. The paper will extensively focus on simulation of the proposed synchronization system. On the basis of this simulation, a complete, fully pipelined VHDL description model is created. This model is composed of a fully parallel polyphase filterbank based on distributed arithmetic, timing error detector and interpolation control block. Finally, RTL synthesis on an Altera Cyclone IV FPGA is presented and resource utilization in comparison with a conventional model is analyzed

Performance Improvement of QPSK Signal Predetection EGC Diversity Receiver

This paper proposes a modification of quadrature phase-shift-keying (QPSK) signal diversity reception with predetection equal gain combiner (EGC). The EGC combining is realized by using the constant modulus algorithm (CMA). Carrier synchronization is performed by the phase locked loop (PLL). Comparative analysis of the modified and ordinary diversity receiver in the presence of carrier frequency offset in the additive white Gaussian noise (AWGN) channel, as well as in Rician fading channel is shown. The proposed diversity receiver allows significant frequency offset compared to the diversity receiver that uses only PLL, and the error probability of the proposed receiver is very close to the error probability of the receiver with only PLL and zero frequency offset. The functionality of the proposed diversity receiver, as well as its properties is experimentally verified on a system based on universal software radio peripheral (USRP) hardware. The performed comparison confirms the expected behavior of the system

A Communication Monitor for Wireless Sensor Networks Based on Software Defined Radio

Link quality estimation of reliability-crucial wireless sensor networks (WSNs) is often limited by the observability and testability of single-chip radio transceivers. The estimation is often based on collection of packer-level statistics, including packet reception rate, or vendor-specific registers, such as CC2420's Received Signal Strength Indicator (RSSI) and Link Quality Indicator (LQI). The speed or accuracy of such metrics limits the performance of reliability mechanisms built in wireless sensor networks. To improve link quality estimation in WSNs, we designed a powerful wireless communication monitor based on Software Defined Radio (SDR). We studied the relations between three implemented link quality metrics and packet reception rate under different channel conditions. Based on a comparison of the metrics' relative advantages, we proposed using a combination of them for fast and accurate estimation of a sensor network link

Mapping DSP algorithms to a reconfigurable architecture Adaptive Wireless Networking (AWGN)

This report will discuss the Adaptive Wireless Networking project. The vision of the Adaptive Wireless Networking project will be given. The strategy of the project will be the implementation of multiple communication systems in dynamically reconfigurable heterogeneous hardware. An overview of a wireless LAN communication system, namely HiperLAN/2, and a Bluetooth communication system will be given. Possible implementations of these systems in a dynamically reconfigurable architecture are discussed. Suggestions for future activities in the Adaptive Wireless Networking project are also given

Performance of a Software Defined Radio based Non-Coherent OFDM Wireless Link

With improved technological successions, wireless communication applications have been incessantly evolving. Owing to the challenges posed by the multipath wireless channel, radio design prototypes have become elemental in all wireless systems before deployment. Further, different signal processing requirements of the applications, demand a highly versatile and reconfigurable radio such as Software Defined Radio (SDR) as a crucial device in the design phase. In this paper, two such SDR modules are used to develop an Orthogonal Frequency Division Multiplexing (OFDM) wireless link, the technology triumphant ever since 4G. In particular, a non-coherent end-to-end OFDM wireless link is developed in the Ultra High Frequency (UHF) band at a carrier frequency of 470 MHz. The transmitter includes Barker sequences as frame headers and pilot symbols for channel estimation. At the receiver, pulse alignment using Max energy method, frame synchronization using sliding correlator approach and carrier offset correction using Moose algorithm are incorporated. In addition, wireless channel is estimated using Least Square (LS) based pilot aided channel estimation approach with denoising threshold and link performance is analyzed using average Bit Error Rate (BER), in different pilot symbol scenarios. In a typical laboratory environment, the results of BER versus receiver gain show that with 4 pilot symbols out of 128 carriers, at a gain of 20 dB, BER is 0.160922, which is reduced to 0.136884 with 16 pilot symbols. The developed link helps OFDM researchers to mitigate different challenges posed by the wireless environment and thereby strengthen OFDM technology