977 research outputs found
Improving Parallel I/O Performance Using Interval I/O
Today\u27s most advanced scientific applications run on large clusters consisting of hundreds of thousands of processing cores, access state of the art parallel file systems that allow files to be distributed across hundreds of storage targets, and utilize advanced interconnections systems that allow for theoretical I/O bandwidth of hundreds of gigabytes per second. Despite these advanced technologies, these applications often fail to obtain a reasonable proportion of available I/O bandwidth. The reasons for the poor performance of application I/O include the noncontiguous I/O access patterns used for scientific computing, contention due to false sharing, and the somewhat finicky nature of parallel file system performance. We argue that a more fundamental cause of this problem is the legacy view of a file as a linear sequence of bytes. To address these issues, we introduce a novel approach for parallel I/O called Interval I/O. Interval I/O is an innovative approach that uses application access patterns to partition a file into a series of intervals, which are used as the fundamental unit for subsequent I/O operations. Use of this approach provides superior performance for the noncontiguous access patterns which are frequently used by scientific applications. In addition, the approach reduces false contention and the unnecessary serialization it causes. Interval I/O also significantly increases the performance of atomic mode operations. Finally, the Interval I/O approach includes a technique for supporting parallel I/O for cooperating applications. We provide a prototype implementation of our Interval I/O system and use it to demonstrate performance improvements of as much as 1000% compared to ROMIO when using Interval I/O with several common benchmarks
Rasm: Compiling Racket to WebAssembly
WebAssembly is an instruction set designed for a stack based virtual machine, with an emphasis on speed, portability and security. As the use cases for WebAssembly grow, so does the desire to target WebAssembly in compilation. In this thesis we present Rasm, a Racket to WebAssembly compiler that compiles a select subset of the top forms of the Racket programming language to WebAssembly. We also present our early findings in our work towards adding a WebAssembly backend to the Chez Scheme compiler that is the backend of Racket. We address initial concerns and roadblocks in adopting a WebAssembly backend and propose potential solutions and patterns to address these concerns. Our work is the first serious effort to compile Racket to WebAssembly, and we believe it will serve as a good aid in future efforts of compiling high-level languages to WebAssembly
A task segment framework to study keylogged translation processes
The Task Segment Framework (TSF) is a tool to analyze full typing flows of translation tasks as keylogged with timestamps recorded for keydown, keyup, mouse clicks and moves, and actions performed in other applications. The TSF assumes that intentional pauses flag stretches where subjects concentrate on unrecorded cognitive processes such as planning and assessment. The interspersed typing stretches are task segments, with or without text, where basic subtasks may be observed, mainly adding new text, changing existing text, and searching for information. Accumulated experience and planning allow translators to lump strategically similar activities together, in order to spare efforts and task switching costs while maximizing efficiency. Hence, task segments may contain activities of just one such subtask or many. Translation fluency is a key notion of the TSF, operationalized through many indicators such as typing speed, prior pause length, TS (task segment) length in events, text length as full words, number of typos and respites (=mid inter-keystroke intervals), subtask(s), and the like. The approach seems particularly sensitive to translation expertise levels and may be applied with variations to other multilectal mediated communication tasks. This article lays down the conceptual basis of the TSF and summarizes its basic notions and constructs
Multiprocessing techniques for unmanned multifunctional satellites Final report,
Simulation of on-board multiprocessor for long lived unmanned space satellite contro
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