Rendering PostScript^TM fonts on FPGAs

This paper describes how custom computing machines can be used to implement a simple outline font processor. An FPGA based co-processor is used to accelerate the compute intensive portions of font rendering. The font processor builds on several PostScript components previously presented by the authors to produce a system that can rapidly render fonts. A prototype implementation is described followed by an explanation of how this could be extended to build a complete system

Compiling a domain specific language for dynamic programming

Steffen P. Compiling a domain specific language for dynamic programming. Bielefeld (Germany): Bielefeld University; 2006

Implementation of the Tetris game for FPGA

In this thesis, a version of the popular computer game Tetris was developed. The game was fully implemented in the VHDL hardware design language with a focus on modular design. A module was developed for operations on the active element that implements horizontal movement, rotations, falling and fast descent. Other game logic was implemented in the module for pseudorandom selection of next element and the module for full row removal. Both of these were connected to the developed module for the playing field. On screen display was implemented in the developed module for display of characters and the module for pipelined rendering, the later of which represents the top level hardware-independent module. Several hardware-dependent modules were developed for interacting with the player: a 7-segment display controller, a VGA controller and a module for tactile buttons. These modules were all connected with the game via a hardware-dependent top level module for the Digilent Nexys4 development board

Implementation of the Tetris game for FPGA

In this thesis, a version of the popular computer game Tetris was developed. The game was fully implemented in the VHDL hardware design language with a focus on modular design. A module was developed for operations on the active element that implements horizontal movement, rotations, falling and fast descent. Other game logic was implemented in the module for pseudorandom selection of next element and the module for full row removal. Both of these were connected to the developed module for the playing field. On screen display was implemented in the developed module for display of characters and the module for pipelined rendering, the later of which represents the top level hardware-independent module. Several hardware-dependent modules were developed for interacting with the player: a 7-segment display controller, a VGA controller and a module for tactile buttons. These modules were all connected with the game via a hardware-dependent top level module for the Digilent Nexys4 development board

Protecting Systems From Exploits Using Language-Theoretic Security

Any computer program processing input from the user or network must validate the input. Input-handling vulnerabilities occur in programs when the software component responsible for filtering malicious input---the parser---does not perform validation adequately. Consequently, parsers are among the most targeted components since they defend the rest of the program from malicious input. This thesis adopts the Language-Theoretic Security (LangSec) principle to understand what tools and research are needed to prevent exploits that target parsers. LangSec proposes specifying the syntactic structure of the input format as a formal grammar. We then build a recognizer for this formal grammar to validate any input before the rest of the program acts on it. To ensure that these recognizers represent the data format, programmers often rely on parser generators or parser combinators tools to build the parsers. This thesis propels several sub-fields in LangSec by proposing new techniques to find bugs in implementations, novel categorizations of vulnerabilities, and new parsing algorithms and tools to handle practical data formats. To this end, this thesis comprises five parts that tackle various tenets of LangSec. First, I categorize various input-handling vulnerabilities and exploits using two frameworks. First, I use the mismorphisms framework to reason about vulnerabilities. This framework helps us reason about the root causes leading to various vulnerabilities. Next, we built a categorization framework using various LangSec anti-patterns, such as parser differentials and insufficient input validation. Finally, we built a catalog of more than 30 popular vulnerabilities to demonstrate the categorization frameworks. Second, I built parsers for various Internet of Things and power grid network protocols and the iccMAX file format using parser combinator libraries. The parsers I built for power grid protocols were deployed and tested on power grid substation networks as an intrusion detection tool. The parser I built for the iccMAX file format led to several corrections and modifications to the iccMAX specifications and reference implementations. Third, I present SPARTA, a novel tool I built that generates Rust code that type checks Portable Data Format (PDF) files. The type checker I helped build strictly enforces the constraints in the PDF specification to find deviations. Our checker has contributed to at least four significant clarifications and corrections to the PDF 2.0 specification and various open-source PDF tools. In addition to our checker, we also built a practical tool, PDFFixer, to dynamically patch type errors in PDF files. Fourth, I present ParseSmith, a tool to build verified parsers for real-world data formats. Most parsing tools available for data formats are insufficient to handle practical formats or have not been verified for their correctness. I built a verified parsing tool in Dafny that builds on ideas from attribute grammars, data-dependent grammars, and parsing expression grammars to tackle various constructs commonly seen in network formats. I prove that our parsers run in linear time and always terminate for well-formed grammars. Finally, I provide the earliest systematic comparison of various data description languages (DDLs) and their parser generation tools. DDLs are used to describe and parse commonly used data formats, such as image formats. Next, I conducted an expert elicitation qualitative study to derive various metrics that I use to compare the DDLs. I also systematically compare these DDLs based on sample data descriptions available with the DDLs---checking for correctness and resilience

Non-Visual Representation of Complex Documents for Use in Digital Talking Books

Essential written information such as text books, bills, and catalogues needs to be accessible by everyone. However, access is not always available to vision-impaired people. As they require electronic documents to be available in specific formats. In order to address the accessibility issues of electronic documents, this research aims to design an affordable, portable, standalone and simple to use complete reading system that will convert and describe complex components in electronic documents to print disabled users

Modelos, métodos e ferramentas para implementação de unidades de controlo virtuais

Mestrado em Engenharia Electrónica e TelecomunicaçõesAs unidades de controlo são um dos tipos de circuitos digitais mais importantes, estando presentes numa grande diversidade de aplicações, desde simples controladores de semáforos até sistemas complexos de processamento de dados. A sua função é estabelecer a sequência de operações realizadas pelo sistema a que pertencem. Dependendo da aplicação, podem ser utilizadas isoladamente ou em conjunto com outros componentes, tais como unidades de execução, sensores e actuadores. Como um caso particular de circuitos sequenciais, são normalmente descritas por modelos orientados ao estado, dos quais a máquina de estados finitos é o exemplo mais conhecido. No entanto, com a crescente complexidade dos sistemas e consequentemente das suas unidades de controlo, este modelo deixou de ser adequado para realizar a sua especificação, uma vez que não suporta a descrição explícita de hierarquia e concorrência. Nesta dissertação são abordados alguns dos modelos e linguagens mais apropriadas para este fim, em particular a máquina de estados finitos hierárquica e/ou paralela, os esquemas de grafos hierárquicos e/ou paralelos e os Statecharts. O aparecimento na última década de dispositivos lógicos de elevada capacidade e programáveis pelo utilizador foi responsável por importantes alterações no projecto de sistemas digitais, principalmente ao nível do tempo, custo e flexibilidade de projecto. Além disso, os dispositivos programáveis dinamicamente, deram origem a uma nova classe de circuitos: os sistemas reconfiguráveis. Estes podem ser usados para construir sistemas computacionais modificáveis, pelo que permitem combinar as vantagens de uma solução programável com o elevado desempenho de uma implementação em hardware. Os sistemas reconfiguráveis podem também ser utilizados em aplicações onde a quantidade de recursos de hardware necessários para uma implementação integral seja elevada e onde nem todos os sub-sistemas sejam necessários em simultâneo, sendo portanto possível e até desejável uma implementação parcial em conjunto com a sua reconfiguração dinâmica. Neste caso, devido à analogia com os sistemas de memória virtual, os sistemas reconfiguráveis são também designados por sistemas de hardware virtual e os respectivos circuitos de controlo por unidades de controlo virtuais. Como as unidades de controlo são específicas de cada projecto e normalmente bastante irregulares, torna-se necessário o estabelecimento de algumas restrições de forma a simplificar o seu projecto e reconfiguração. Nesta dissertação é proposta uma arquitectura de unidades de controlo virtuais baseada numa estrutura predefinida, parametrizável e optimizada para o dispositivo de implementação utilizado, a FPGA XC6200 da Xilinx. Esta arquitectura em conjunto com os modelos e os dispositivos lógicos programáveis utilizados permite construir unidades de controlo complexas, flexíveis, extensíveis e reutilizáveis. O processo de síntese de unidades de controlo é também abordado, com uma atenção especial para as técnicas mais apropriadas para as FPGAs. Finalmente, para suportar a reconfiguração dinâmica dos circuitos desenvolvidos, foi construída uma biblioteca de classes em C++ e um controlador (device driver) para a placa de desenvolvimento utilizada neste trabalho.Control units are one of the most important types of digital circuits. They are used in a great variety of applications, from simple traffic light controllers to complex data processing systems. Their function is to establish the sequence of operations accomplished by the system they belong to. Depending on the application, they can be used separately or together with other components, such as execution units, sensors or actuators. Because control units are a particular kind of sequential circuits, they are usually described by state-oriented models, the finite state machine being the best known example. However, with the increasing complexity of the systems and consequently of its control units, this model is becoming less adapted to perform its specification, because it does not support the explicit description of hierarchy and concurrency. This dissertation presents some of the models and languages better suited to this purpose, in particular the hierarchical and/or parallel finite state machine, the hierarchical and/or parallel graph schemes and the Statecharts formalisms. The appearance in the last decade of high capacity user programmable logic devices was responsible for important modifications in the way digital systems are designed, mainly in terms of time, cost and design flexibility. Besides, the availability of dynamically reconfigurable devices made possible the emergence of a new class of circuits: the reconfigurable systems. They can be used to build modifiable computational systems combining the advantages of a programmable solution with the high performance of a hardware implementation. The reconfigurable systems can also be used in applications where the amount of required hardware resources for an integral implementation is too high or at least bigger than desirable and where all the subsystems are not necessary simultaneously, making possible a partial implementation in conjunction with its dynamic reconfiguration. Due to the analogy with virtual memory systems, these systems can also be called virtual hardware systems and their respective control circuits virtual control units. Because the control units are specific for each project and usually very irregular, it is necessary to impose some constraints in order to simplify their design and reconfiguration. In this dissertation an architecture for virtual control units based on a predefined, parameterizable and optimized template for a particular target device, the FPGA XC6200 from Xilinx, is proposed. However, the main ideas of this architecture can also be easily applied to other FPGA families. The use of this architecture together with the hierarchical and/or parallel models and the dynamically reconfigurable logic devices allows building complex, flexible, extensible and reusable control units. This contributes to a decrease in development time and permits system updates after the completion of the design and manufacturing cycles. The control unit synthesis process is also presented with special emphasis on the techniques better suited to FPGA implementation. Finally, to support the dynamic reconfiguration of the developed circuits, a C++ class library and a device driver for the development system used in this work were built

Non-visual representation of complex documents for use in digital talking books

According to a World Intellectual Property Organization (WIPO) estimation, only 5% of the world's one million print titles that are published every year are accessible to the approximately 340 million blind, visually impaired or print disabled people. Equal access to information is a basic right of all people. Essen- tial information such as flyers, brochures, event calendars, programs, catalogues and booking information needs to be accessible by everyone. Information helps people to make decisions, be involved in society and live independent lives. Ar- ticle 21, Section 4.2. of the United Nation's Convention on the rights of people with disabilities advocates the right of blind and partially sighted people to take control of their own lives. However, this entitlement is not always available to them without access to information. Today, electronic documents have become pervasive. For vision-impaired people electronic documents need to be available in specific formats to be accessible. If these formats are not made available, vision-impaired people are greatly disadvantaged when compared to the general population. Therefore, addressing electronic document accessibility for them is an extremely important concern. In order to address the accessibility issues of electronic documents, this research aims to design an affordable, portable, stand-alone and simple to use "Complete Reading System" to provide accessible electronic documents to vision impaired

NASA Tech Briefs, October 1993

Topics include: Sensors; esign and Engineering; Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Computer Programs; Mechanics; Machinery; Fabrication technology; Mathematics and Information Sciences; Life Sciences; Books and Reports